Analog Integrated Circuits and Signal Processing

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Performance comparison of integrated fully-differential filterless class-D amplifiers with different feedback techniques
Analog Integrated Circuits and Signal Processing - Tập 76 - Trang 167-177 - 2013
Yuh-Shyan Hwang, Jian-Hong Shen, Jiann-Jong Chen, Ming-Ren Fan
Two integrated stereo fully differential filterless class-D amplifiers are presented in this paper. The object is to develop a modulation of a class-D audio amplifier with high power efficiency in this paper. The traditional H-bridge class-D audio amplifier has a shortcoming of large signal distortion which is worse than realized. However, the proposed circuit improves the drawback and provides hi...... hiện toàn bộ
Design of new practical phase shaping circuit using optimal pole–zero interlacing algorithm for fractional order PID controller
Analog Integrated Circuits and Signal Processing - Tập 91 - Trang 131-145 - 2017
Mohan V. Aware, Anjali S. Junghare, Swapnil W. Khubalkar, Ashwin Dhabale, Shantanu Das, Rutuja Dive
This paper presents the implementation of fractional order PID (FO-PID) controller using hardwired modules of constant phase element (CPE). A new approach of phase shaping by slope cancellation of asymptotic phase plots for zeros and poles within the given bandwidth is realized. Analog circuits, which exhibit analog fractional-order integrator and fractional-order differentiator, are used for buil...... hiện toàn bộ
GigaHertz MUX-DEMUX Chip with HF BIST
Analog Integrated Circuits and Signal Processing - Tập 12 - Trang 29-48 - 1997
Lars Hellberg, Owe Thessén, Hannu Tenhunen, José-Maria Gobbi
Full functional test at speed, in-situ is an ideal choice for use for detection of errors in circuit behaviour for high speed broadband communication circuits and to avoid test set-up disturbances on high frequency signals. This article presents a novel technique to solve the high frequency test of Gbit/s data rate Time-Division Multiplexer/Demultiplexer circuits. This in-situ test technique is ba...... hiện toàn bộ
A Transformer-neutralized 0.6 V V DD 17–29 GHz LNA and its application to an RF front-end
Analog Integrated Circuits and Signal Processing - Tập 83 - Trang 173-186 - 2015
Sandipan Kundu, Jeyanandh Paramesh
A low-noise (LNA) amplifier that combines transformer-neutralization with bandwidth enhancement is introduced to enable a compact design capable of operating from a widely scalable supply voltage. A supply-voltage scalable 17–29 GHz ultra-wideband (UWB) multi-stage LNA prototype employing a single transistor between V DD and ground in all stages,...... hiện toàn bộ
A small area 8 bits 50 MHz CMOS DAC for Bluetooth transmitter
Analog Integrated Circuits and Signal Processing - Tập 57 - Trang 69-77 - 2008
Hugo Hernández, Wilhelmus Van Noije, Elkim Roa, João Navarro
This paper presents a small-area CMOS current-steering segmented digital-to-analog converter (DAC) design intended for RF transmitters in 2.45 GHz Bluetooth applications. The current-source design strategy is based on an iterative scheme whose variables are adjusted in a simple way, minimizing the area and the power consumption, and meeting the design specifications. A theoretical analysis of stat...... hiện toàn bộ
High speed RLC equivalent RC delay model for global VLSI interconnects
Analog Integrated Circuits and Signal Processing - Tập 100 - Trang 109-117 - 2019
Sunil Jadav, Munish vashishath, Rajeevan Chandel
Current-mode signaling significantly is known for increasing the bandwidth of on-chip interconnects and reduces the overall propagation delay. In this paper feature of current mode interconnects is exploited for investigating the performance of RLC equivalent ReffCT mathematical delay model of interconnects. This is due to a simple RC interconnects model which results a significant error in delay ...... hiện toàn bộ
Analog VLSI Stochastic Perturbative Learning Architectures
Analog Integrated Circuits and Signal Processing - - 1997
Gert Cauwenberghs
We present analog VLSI neuromorphic architectures fora general class of learning tasks, which include supervised learning,reinforcement learning, and temporal difference learning. Thepresented architectures are parallel, cellular, sparse in globalinterconnects, distributed in representation, and robust to noiseand mismatches in the implementation. They use a parallel stochasticperturbation techniq...... hiện toàn bộ
A 200-mA, 93% peak power efficiency, single-inductor, dual-output DC–DC buck converter
Analog Integrated Circuits and Signal Processing - - 2009
Edoardo Bonizzoni, Fausto Borghetti, Piero Malcovati, Franco Maloberti
A single-inductor dual-output (SIDO) DC–DC buck converter is presented. The circuit uses only one (external) inductor to provide two independent output voltages ranging from 1.2 V to the power supply (2.6–5 V) with a maximum total output current of 200 mA. The proposed converter has been fabricated in a 0.35-μm p-substrate CMOS technology. Measurement results demonstrate that a peak power efficien...... hiện toàn bộ
SAR ADC architecture with 98.8 % reduction in switching energy over conventional scheme
Analog Integrated Circuits and Signal Processing - Tập 84 - Trang 89-96 - 2015
Yuhua Liang, Zhangming Zhu, Ruixue Ding
A novel power saving switching scheme for successive approximation register analogue-to-digital converter is proposed in this letter. Adopting the top-plated sampling technology and dummy-capacitor-aided switching technology, the number of capacitors can be reduced by 75 % compared with the conventional scheme. Employing the one-side switching instead technology and higher-bit switching instead te...... hiện toàn bộ
Editorial
Analog Integrated Circuits and Signal Processing - Tập 6 - Trang 177-178 - 1994
Tổng số: 2,969   
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