Analog Integrated Circuits and Signal Processing

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Analog Integrated Circuits and Signal Processing - Tập 6 - Trang 177-178 - 1994
Low quiescent current capacitorless small gain stages LDO with controlled pass transistors
Analog Integrated Circuits and Signal Processing - Tập 94 - Trang 323-331 - 2017
Sadeque Reza Khan, Iram Nadeem
A low quiescent current 180-nm output-capacitorless low-dropout regulator with small-gain stages (SGSs) is presented in this paper. The proposed technique permits the regulator to distribute the load current into two power transistors depending on the demand of the load using a controller based on load variation criterion. SGSs are introduced to enhance loop gain without low-frequency poles. The p...... hiện toàn bộ
A hierarchical analog test bus framework for testing mixed-signal integrated circuits and printed circuit boards
Analog Integrated Circuits and Signal Processing - Tập 4 - Trang 261-268 - 1993
Nai-Chi Lee
Progress in analog circuit testing has been hindered by the lack of structured design-for-testability methodologies. With the increasing complexity of analog/mixed-signal circuits, test program development time is now a major obstacle in achieving shorttime-to-market, while production testing cost is a prominent factor in total production cost. TheAnalog Autonomous Test is a structured design-for-...... hiện toàn bộ
Lattice architectures for multiple-scale gaussian convolution, image processing, sinusoid-based transforms and gabor filtering
Analog Integrated Circuits and Signal Processing - - 1993
K. Raghunath Rao, Jezekiel Ben-Arie
This article describes a novel lattice architecture which performs multiple-scale Gaussian convolution of signals of any desired dimension. The principle of operation is based on the central limit theorem and involves repetitive convolution with small kernels to generate Gaussian smoothing. A pyramidal implementation of this architecture is also discussed which retains the fine scale (standard dev...... hiện toàn bộ
A 24–28 GHz high-stability CMOS power amplifier using common-gate-shorting (CGS) technique with 17.5 dBm $${\hbox {P}}_{sat}$$ and 16.3% PAE for 5G millimeter-wave applications
Analog Integrated Circuits and Signal Processing - Tập 98 - Trang 193-200 - 2018
Chunshen Jiang, Runxi Zhang, Chunqi Shi
This paper presents a 24–28 GHz high-stability millimeter-wave power amplifier (PA) implemented in low-cost $$0.13\, \upmu \hbox {m}$$ CMOS process. The PA consists of two cascode stages with passive transformer-based input and output baluns. The...... hiện toàn bộ
The EPAC Architecture: An Expert Cell Approach to Field Programmable Analog Devices
Analog Integrated Circuits and Signal Processing - - 1998
Hans W. Klein
This paper describes the architectural configuration and various design trade-offs of the Electrically Programmable Analog Circuit (EPACTM), an expert-cell approach to meeting the market needs for an analog counterpart to the digital FPGA. The paper provides an overview of the technology, discusses architectural issues, and describes the internal operation of the first commercial EPAC devices. The...... hiện toàn bộ
Analog circuit diagnosis based on the nullor concept and multiport description of the circuit
Analog Integrated Circuits and Signal Processing - Tập 95 - Trang 141-149 - 2018
Srdjan Dragomira Djordjevic
The subject of this paper is the fault diagnosis of analog circuits based on the use of nullor concept. The fault location technique presented in the paper can be implemented in the general-purpose analysis program which provides many advantages, of which the most important is the automation of the diagnosis process. A simulation based diagnosis model can be obtained by introducing the norators ac...... hiện toàn bộ
RF transceiver and transmission line behavioral modeling in VHDL-AMS for wired RFNoC
Analog Integrated Circuits and Signal Processing - Tập 92 - Trang 103-114 - 2017
Lounis Zerioul, Myriam Ariaudo, Emmanuelle Bourdel
Despite the exceptional progress of MPSoC architectures, on chip communication networks remain a lock for the evolution of their performances due to the power consumption and the delay in data carrying. In this context, the wired radio frequency (RF) network on chip (RFNoC) has emerged. In this paper, we developed a library of RF component models in VHDL-AMS for time domain simulation. This librar...... hiện toàn bộ
A Very High-Speed BiCMOS Replicating Current Comparator for Use in Viterbi Decoders
Analog Integrated Circuits and Signal Processing - Tập 27 - Trang 117-126 - 2001
Andreas Demosthenous, John Taylor
We describe a low power, asynchronous BiCMOS replicating currentcomparator (RCC) cell for use in analogue Viterbi decoders. The circuitemploys negative feedback to provide an accurate virtual ground for inputcurrent summation and comparison. Thus, although the circuit parasitics arecharged from the power supply as in the case of RCC's with positive feedback, no latching occurs. A resetphase is the...... hiện toàn bộ
A simple and effective feedback structure for variable-Q filter design
Analog Integrated Circuits and Signal Processing - Tập 107 - Trang 463-473 - 2021
Arman Kheirati Roonizi, Hossein Pakniat
This paper proposes a simple and effective feedback structure to implement the variable-Q band-pass filter. An effective variable-Q band-pass filter can be designed by using integral-plus-derivative in the feedback pass. The stability of the model is shown in both continuous and discrete-time systems. Also, we demonstrate that the model could indeed achieve the desired center frequency as a precis...... hiện toàn bộ
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