Structured cold point thermoelectric coolers - Trang 125-128
U. Ghoshal
Solid-state thermoelectric coolers can revolutionize thermal management of
electronics and optoelectronic systems, and small-scale refrigeration if the
coolers could attain thermodynamic efficiency greater than 30% of the ideal
Carnot cycle. The maximum temperature differential and the efficiency of
thermoelectric coolers are known to depend on material properties through the
thermoelectric figure... hiện toàn bộ
#Thermoelectricity #Temperature dependence #Thermal conductivity #Thermal management of electronics #Transistors #Solid state circuits #Thermal management #Refrigeration #Thermodynamics #Material properties
Index - Trang 199-201 - 2002
This index covers all technical items that appeared in this conference.
#Indexes
Charge retention characteristics of SiGe quantum dot flash memories - Trang 151-152
Dong-Won Kim, F.E. Prins, Taehoon Kim, Dim-Lee Kwong, S. Banerjee
For application to nonvolatile memory devices, a long retention time is most
important. Recent efforts on alternate high-K gate dielectric materials
replacing silicon dioxide in complementary metal-oxide-semiconductor (CMOS)
technology have demonstrated a higher /spl epsiv/ values, reduced leakage,
improved resistance to boron diffusion, and better reliability characteristics.
In this paper we pre... hiện toàn bộ
#Silicon germanium #Germanium silicon alloys #Quantum dots #Flash memory #CMOS technology #Nonvolatile memory #High K dielectric materials #Inorganic materials #Silicon compounds #Boron
Electron inversion layer mobility in strained-Si n-MOSFETs with high channel doping concentration achieved by ion implantation - Trang 43-44
H.M. Nayfeh, J.L. Hoyt, C.W. Leitz, A.J. Pitera, E.A. Fitzgerald, D.A. Antoniadis
Inversion layer mobility measurements in strained-Si n-MOSFETs fabricated using
a typical MOSFET process including high temperature steps and with various
channel doping concentrations, achieved by boron ion implantation, are compared
with co-processed bulk-Si n-MOSFETs. It is found that a near-universal mobility
relationship with vertical effective electric field, E/sub eff/, exists for
strained-... hiện toàn bộ
#Electron mobility #MOSFET circuits #Doping #Implants #Ion implantation #Materials science and technology #Temperature #Boron #Threshold voltage #Dielectric substrates
Tunneling through multi-layer gate dielectrics - an analytical model - Trang 105-106
I. Polishchuk, Yee-Chia Yeo, Tsu-Jae King, Chenming Hu
We propose an analytical direct-tunneling model for multilayer gate dielectrics.
This model predicts the amount of gate leakage current as a function of
equivalent oxide thickness of the gate dielectric stack and the composition of
the stack. This simple model is a useful tool in the development of future CMOS
gate dielectric stacks.
#Tunneling #Dielectrics #Analytical models #Leakage current #Semiconductor device modeling #Electrons #Frequency #Voltage #Predictive models #CMOS integrated circuits
Impact of NH/sub 3/ pre-treatment on the electrical and reliability characteristics of ultra thin hafnium silicate films prepared by re-oxidation method - Trang 195-196
S. Gopalan, R. Choi, K. Onishi, R. Nieh, C.S. Kang, H.-J. Cho, S. Krishnan, J.C. Lee
The trade-offs between the benefits of NH/sub 3/ pre-treatment such as improved
scalability, lower leakage and higher breakdown fields, and potential issues
such as large hysteresis, degraded MOSFET characteristics and poorer reliability
on Hf-silicate devices have been studied.
#Capacitors #Hysteresis #MOS devices #MOSFETs #Degradation #Atomic layer deposition #Gate leakage #Annealing #Life estimation #Lifetime estimation
GaAlAs/GaAs micromachined tunable vertical filter with low tuning voltage below 5 volts - Trang 143-144
T. Amano, F. Koyama, T. Hino, M. Arai, A. Matsutani
MEMS based tunable filters and vertical cavity surface-emitting lasers (VCSELs)
are attracting much interest because of their unique features, such as wide
continuous tuning, polarization insensitive operation and 2-dimensional array
integration. There remain difficulties in tuning range and tuning voltage of
such MEMS based filters using electrostatic force because a micromachined
cantilever is p... hiện toàn bộ
#Gallium arsenide #Filters #Low voltage #Laser tuning #Tunable circuits and devices #Micromechanical devices #Vertical cavity surface emitting lasers #Electrostatics #Surface emitting lasers #Polarization
Nano-scale implantless Schottky-barrier SOI FinFETs with excellent ambipolar performance - Trang 45-46
Horng-Chih Lin, Meng-Fan Wang, Fu-Ju Hou, Jan-Tsai Liu, Fu-Hsiang Ko, Hsuen-Li Chen, Guo-Wei Huang, Tiao-Yuan Huang, S.M. Sze
A novel nano-scale SOI device featuring silicide Schottky source/drain and
field-induced S/D extensions is proposed and demonstrated. Excellent p- and
n-channel performance with nearly ideal subthreshold swing (/spl sim/ 60
mV/dec.) and high on-/off-state current ratio (>10/sup 9/ and >10/sup 8/ for n-
and p-channel modes, respectively) is realized, for the first time, on a single
device. These en... hiện toàn bộ
#FinFETs #Silicides #Etching #Fabrication #Voltage #Nanoscale devices #Fluctuations #Lithography #Doping #Oxidation
Speed advantage of optimized metal S/D in 25 nm dual-gate fully-depleted CMOS - Trang 77-78
D. Connelly, D. Grupp, D. Yergeau
With shrinking dimensions, control of extrinsic impedance is becoming
increasingly performance limiting. Improvements to source/drain (S/D) technology
thus become critical to technology scaling. Metal S/D is a promising approach. A
doped S/D device was modeled with a two-component S/D profile: an ultra-steep
extension profile offset from the gate edge, and a stronger primary S/D profile
aligned to... hiện toàn bộ
#Immune system #Delay #Degradation #Impedance #Contact resistance #MOS devices #CMOS technology #Virtual colonoscopy #Circuit simulation #Integrated circuit interconnections
Multilayer tunneling barriers for nonvolatile memory applications - Trang 153-154
P. Blomme, B. Govoreanu, M. Rosmeulen, J. Van Houdt, K. De Meyer
A tunnel barrier consisting of two materials with different dielectric constant
is demonstrated to show that improved programming and/or erasing performance is
obtained compared to conventional oxide layers. It is also shown that charge
trapping is not a showstopper for the application of such stacks in floating
gate nonvolatile memory devices.
#Nonhomogeneous media #Tunneling #Nonvolatile memory #Capacitors #Dielectric constant #Low voltage #High K dielectric materials #Testing #EPROM #Lead compounds