Proceedings. IEEE Asia-Pacific Conference on ASIC,

Công bố khoa học tiêu biểu

* Dữ liệu chỉ mang tính chất tham khảo

Sắp xếp:  
A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 1-4
Hsiang-Hui Chang, Shang-Ping Chen, Kuang-Wei Cheng, Shen-Iuan Liu
In this paper, a very low-voltage fourth-order bandpass delta-sigma modulator with a two-path architecture is presented. Using the modified switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without any voltage multiplier or bootstrapping switch. Realized in a 0.25 /spl mu/m 1P5M standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-dist...... hiện toàn bộ
#Delta modulation #Low voltage #Clocks #Transfer functions #Switching circuits #Voltage control #Band pass filters #Signal processing #Feedback circuits #Sampling methods
Single chip video segmentation system with a programmable PE array
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 233-236
Shao-Yi Chien, Yu-Wen Huang, Bing-Yu Hsieh, Liang-Gee Chen
Video segmentation is a very important unit in content-based video encoding systems, such as MPEG-4. In this paper, a single chip video segmentation system is proposed. First, a hardware-oriented video segmentation algorithm is developed, which contains only local pixel operations and morphological operations. Simulation results show that the segmentation results of the proposed algorithm are sati...... hiện toàn bộ
#MPEG 4 Standard #Hardware #Image coding #Shape #Motion estimation #Design engineering #Morphological operations #Image segmentation #Morphology #Video sequences
2.5 Gbps CMOS laser diode driver with APC and digitally controlled current modulation
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 77-80
Chih-Hsien Lin, I-Chen Yao, Chun-Cheng Kuo, Shyh-Jye Jou
This laser diode driver operates at 2.5 Gbps. It contains a driver, a reference voltage generator, an automatic power control circuit and digitally controlled blocks of bias current and modulation current. The TSMC 0.35 /spl mu/m 1P4M CMOS digital process is used to fabricate this chip. APC is used to maintain the laser diode output power and it works when photodetector gain ranges from 1/80 to 1/...... hiện toàn bộ
#Diode lasers #Digital control #Optical control #Digital modulation #Driver circuits #Power generation #Automatic control #Power control #Automatic generation control #Automatic voltage control
ASIC implementation of a new and efficient wavelet coding algorithm
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 229-232
Seonyoung Lee, Kyeongsoon Cho
The image compression based on discrete wavelet transform has been widely accepted in industry since it shows no block artifacts and provides a better image quality when compressed to low bits per pixel, compared to JPEG. The coefficients generated by discrete wavelet transform are quantized to reduce the number of code bits to represent them. After quantization, lossless coding processes are usua...... hiện toàn bộ
#Application specific integrated circuits #Image coding #Discrete wavelet transforms #Quantization #Hardware design languages #Low pass filters #Discrete cosine transforms #Pixel #Transform coding #Data compression
A staged carry-save-adder array for Montgomery modular multiplication
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 97-100
Jhing-Fa Wang, Po-Chuan Lin, Ping-Kun Chiu
In this paper, an efficient VLSI architecture to compute the n-bit Montgomery modular multiplication is proposed. By using the staged carry save adder (CSA) array, the computation cycles of addition reduced by about 3n/8. In addition, we apply the switch unit to save 2Q-2 registers from the traditional Q-bit CSA. Compare with the original method, the total clock cycles can be reduced by 68% in the...... hiện toàn bộ
#Hardware #Clocks #Costs #Switches #Public key cryptography #Cities and towns #Computer architecture #Data security #Modems #Digital signatures
A low-power Reed-Solomon decoder for STM-16 optical communications
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 351-354
Hsie-Chia Chang, Chien-Ching Lin, Chen-Yi Lee
In this paper, a low-power Reed-Solomon (RS) decoder for STM-16 optical communications is presented. It mainly contains one (255,239) RS decoder and four 2 K-bit embedded memory for correcting the received codewords. Except the novel syndrome calculator reducing half the syndrome computations, our proposal also features a modified Berlekamp-Massey algorithm in the key equation solver and a termina...... hiện toàn bộ
#Reed-Solomon codes #Decoding #Polynomials #Optical fiber communication #Equations #Energy consumption #Proposals #Computational modeling #Circuit simulation #Power dissipation
A 2.4 GHz Bluetooth transceiver in 0.18 /spl mu/m CMOS
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 117-120
Bang-Sup Song, V. Leung, T. Cho, D. Kang, S. Dow
A 2.4 GHz GFSK transceiver in 0.18 /spl mu/m CMOS implements all Bluetooth modem functions with -80 dBm input sensitivity at 0.1% BER. A baseband IQ processor implements IF functions at 2 MHz with a 7th-order complex Bessel bandpass filter, limiter, quadricorrelator baseband FM demodulator, and differential slope sensing bit slicer. The chip consumes 80 mW for RX and 50 mW for TX at 1.8 V and occu...... hiện toàn bộ
#Bluetooth #Transceivers #Filters #Frequency conversion #Radio frequency #Transmitters #Voltage-controlled oscillators #Baseband #Radiofrequency amplifiers #Degradation
A high-throughput low-cost AES cipher chip
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 85-88
Tsung-Fu Lin, Chih-Pin Su, Chih-Tsun Huang, Cheng-Wen Wu
We propose an efficient hardware implementation of the AES (Advanced Encryption Standard) algorithm, with key expansion capability. Compared with the widely used table-lookup technique, the proposed basis transformation technique reduces the hardware overhead of the S-box by 64%. Our pipelined design has a very high throughput rate. Using a typical 0.35 /spl mu/m CMOS technology, a 200 MHz clock i...... hiện toàn bộ
#Elliptic curve cryptography #Hardware #CMOS technology #Clocks #Application specific integrated circuits #Table lookup #Laboratories #Costs #Internet #Communication system security
Tunable injection current compensation architecture for high fill-factor self-buffered active pixel sensor
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 101-104
Hsien-Chun Chang, Ya-Chin King
A high fill-factor self-buffered active pixel sensor and a tunable injection current compensation architecture for high dynamic range imager is proposed for scaled CMOS technology. The new cell, including a photodiode, is formed by n-well and p-type substrate and a single-transistor output buffer can achieve fill-factor of 55%. Dynamic range of up to 120 dB is projected by simulation results. Expe...... hiện toàn bộ
#CMOS image sensors #Diodes #Voltage #Tunable circuits and devices #Dynamic range #CMOS technology #Pixel #Circuit simulation #Costs #Equivalent circuits
A quadrature modulator with enhanced harmonic rejection filter
Proceedings. IEEE Asia-Pacific Conference on ASIC, - - Trang 319-322
Peng-Un Su, J.-M. Hsu
When using a current-commutating quadrature modulator in a wireless transmitter, undesired spurs are generated at 3f/sub LO/, 5f/sub LO/, and so on, thus requiring a good filter to suppress those unwanted signals. By using the non-ideal characteristic of the non-zero output resistance of the amplifier in a Sallen-Key filter, a second order low-pass filter with transmission zeros is proposed. In th...... hiện toàn bộ
#Power harmonic filters #Low pass filters #Frequency #Transmitters #Band pass filters #Transfer functions #Filtering theory #Local oscillators #Q factor #Electronic mail
Tổng số: 86   
  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 9