Proceedings. IEEE Asia-Pacific Conference on ASIC,
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A CMOS current-mode band-pass filter with small chip area
- Trang 13-16
In this paper, we propose a CMOS current-mode band-pass filter with small chip
area. Q (quality factor) of the proposed filter can be mostly determined by the
ratio of the MOSFET transconductances in a Q-setting part, not by the ratio of
the values of two capacitance similar to the conventional band-pass filter.
Therefore, the proposed filter does not need large capacitance that occupies
large are...
#Band pass filters #Circuits #Passband #Q factor #Capacitors #Parasitic capacitance #CMOS technology #Permission #Transfer functions #Transconductance
Memory synthesis for low power ASIC design
- Trang 335-342
In this paper we describe a multi-module, multiport memory design procedure that
satisfies area and/or energy constraints. Our procedure consists of using ILP
models and heuristic-based algorithms to determine (a) the memory configuration
with minimum area, given the energy bound, (b) the memory configuration with
minimum energy, given the area bound, (c) array allocation such that the energy
cons...
#Application specific integrated circuits #Energy consumption #Heuristic algorithms #Costs #Electrocardiography #Very large scale integration #Focusing #Multidimensional systems #Streaming media #Video sequences
A new low-voltage CMOS 1-bit full adder for high performance applications
- Trang 21-24
In this paper, a new low-voltage high-performance CMOS 1-bit full adder circuit
is proposed. The new design is derived by combining XOR (XNOR) gates, used in
the conventional full adder, and transmission gates. The proposed full adder can
provide full voltage swing at a low supply voltage and offers superior
performance in both power and speed than the conventional full adder, the
transmission ful...
#Adders #Low voltage #Very large scale integration #Power supplies #Power dissipation #CMOS technology #Digital signal processing #Batteries #Circuit synthesis #Energy consumption
Spread-spectrum clocking in switching regulators to reduce EMI
- Trang 141-144
This paper describes a simple, inexpensive technique for intentionally
broadening and flattening the spectrum of a DC-DC converter (switching
regulator) to reduce electromagnetic interference (EMI). This noise spectrum
broadening technique involves intentionally introducing pseudorandom dithering
of control clock timing, which can be achieved by adding simple digital
circuitry. This technique can ...
#Spread spectrum communication #Clocks #Regulators #Electromagnetic interference #Circuit noise #DC-DC power converters #Noise reduction #Circuit testing #Switching converters #Timing
Design of a DMT-based baseband transceiver for very-high-speed digital subscriber lines
- Trang 367-370
In this paper, we propose a transceiver design for the ETSI VDSL standard that
uses the discrete multi-tone (DMT) modulation. Algorithms for channel
estimation/equalization, symbol synchronization, sampling clock tracking are
designed and integrated into the receiver architecture. Fixed-point simulation
of the whole system shows that the proposed receiver architecture is capable of
very high-rate ...
#Baseband #Transceivers #DSL #Telecommunication standards #OFDM modulation #Channel estimation #Synchronization #Sampling methods #Clocks #Algorithm design and analysis
A selectively accessing TLB for high performance and lower power consumption
- Trang 45-48
This paper presents a structure of TLB (translation lookaside buffer) for low
power consumption but high performance. The proposed TLB is constructed as a
combination of one block buffer and two-way banked TLBs. The processor can
access the block buffer or one of two banked TLBs selectively. This feature is
quite different from that used in the traditional block buffering technique.
Simulation res...
#Energy consumption #Process design #Modems #Delay #Laboratories #Computer science #Large scale integration #Personal digital assistants #Portable computers #Cellular phones
A high performance class AB CMOS rail to rail voltage follower
- Trang 161-163
A high performance class AB CMOS rail to rail voltage follower is presented. The
circuit is based on the symmetrical class AB voltage follower and can operate
under supply voltages of /spl plusmn/1.5 V. The proposed circuit has power
dissipation of 2.5 mW under quiescent condition and can drive /spl plusmn/1.2 V
to 250 /spl Omega/ load with a total harmonic distortion of less than 0.6
percent and ...
#Voltage #Power dissipation #MOSFETs #CMOS technology #Impedance #Drives #Harmonic distortion #Circuit stability #Joining processes #MOS devices
Power efficient MPEG-4 decoder architecture featuring low-complexity error resilience
- Trang 225-228
A media processor supporting MPEG-4 SP@LI and H.263 baseline has been developed.
This processor includes a RISC core, dedicated video decoding hardware,
audio/voice decoder, post processor, and some peripherals. In order to increase
flexibility and reduce power dissipation, separated bus architecture, which may
minimize the bus transaction, is adopted. An enhanced error resiliency is also
equipped...
#MPEG 4 Standard #Decoding #Resilience #Coprocessors #Energy consumption #Reduced instruction set computing #Codecs #Clocks #Process control #SDRAM
Wideband impedance matched GaInP/GaAs HBT Gilbert micromixer with 12 dB gain
- Trang 323-326
A wideband GaInP/GaAs HBT micromixer with 12 dB conversion gain is demonstrated
from DC to 9 GHz. Input P/sub 1dB/ of -4 dBm and IIP/sub 3/ of 2 dBm are also
achieved. The supply voltage is 5 V and the total quiescent current of the
circuit is 5 mA including the bias circuit. The single-to-differential input
stage in Gilbert micromixer renders good frequency response and eliminates the
need for co...
#Wideband #Impedance #Gallium arsenide #Heterojunction bipolar transistors #Gain #Circuits #Radio frequency #Mixers #Transconductance #Frequency response
System-level requirements of DC-DC converters for dynamic power supplies of power amplifiers
- Trang 149-152
The energy efficiency of battery-operated portable applications can be improved
by increasing the efficiency of power amplifiers (PAs). By dynamically changing
the supply voltage from the fixed battery supply using a DC-DC converter, the PA
can be operated with high efficiency during power back-off. This paper presents
the system level requirements for a buck converter and other blocks in a dynami...
#DC-DC power converters #Power supplies #Power amplifiers #Energy efficiency #Voltage #Batteries #Buck converters #Circuit simulation #Delay effects #Power system modeling