Symposium 1989 on VLSI Circuits
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A 26 dB, 1.2 GHz wideband GaAs MESFET variable gain amplifier
Symposium 1989 on VLSI Circuits - - 1989
As an example of analog circuit design in GaAs MESFET IC technology. which wants for the breadth of design techniques that silicon ICs enjoy. we describe here a monolithic amplifier offering a gain variable from 30 dB to below 0 dB. at a bandwidth in excess of 1 GHz, and matched to 5OΩ at the input and output pons. This may find application in wideband digital communication receivers. in fiber opt......
#Gain #Bandwidth #Integrated circuits #Voltage measurement #MESFETs #Gallium arsenide #Gain measurement
A latch-up like new failure mechanism for high density cmos dynamic RAM's - hysteresis in operating Vcc range
Symposium 1989 on VLSI Circuits - - 1989
AS the RAM has reached higher Integration, transistors have been miniaturized as well as the number of transistors on a chip has increased. Therefore, the substrate current generated by the RAM circuit due to impact ionization has increased drastically. In addition, since substrate impurity concentration has increased with the device scaling, the back-gate bias effect of a transistor has become st......
#Random access memory #Substrates #Amplitude modulation #Transistors #Hysteresis #Threshold voltage #Couplings
A circuit design for 2 Gbit/s Si brpolar crosspoint switch LSIs
Symposium 1989 on VLSI Circuits - - 1989
A SI bipolar circuits technology for Gblt/s crosspoint switch LSIs Is described. Adopting a new circuit design and a Super Self-aligned process Technology (SST-IA), an 8x8 and a 16x16(+16) crosspoint switch LSis are fabricated.
#Switches #Large scale integration #Switching circuits #Latches #Silicon #Circuit synthesis #Multiplexing
Ultra-highly parallel residue arithmetic VLSI system
Symposium 1989 on VLSI Circuits - - Trang 127-128 - 1989
The demands for high-speed computations are obvious in many real-time applications. However, arithmetic operating speed is restricted by carry propagation in conventional binary systems, SO that the residue number system ( RNS 1 is of particular interest because of the inherent property that addition and multiplication are carry-free arithmetic [l].
#Very large scale integration #Parallel processing #Transistors #Real-time systems #Hardware #Encoding #Decoding
An experimental low temperature DRAM
Symposium 1989 on VLSI Circuits - - 1989
For over a decade many investigators have studied and demonstrated performance advantages of MOS devices at liquid nitrogen temperatures [l]. Recently the concept of "high speed" DRAM, a new category of DRAM emphasizing performance. at Sr" sacrifice to cost, has been demonstrated [21. In this paper these two concepts are successfully merged to produce a very high speed 512K CMOS DRAM with a 12 ns ......
#Temperature measurement #Temperature sensors #Random access memory #Land surface temperature #Semiconductor device measurement #Power measurement #Error analysis
A low-poswer wide-band amplifier using a new parasitic capacitance compensation technique
Symposium 1989 on VLSI Circuits - - 1989
A low-power. wide-band amplifier is needed for a tuner IC. a synthesizer LSI and an cqualizing amplifier IC fa optical fiber transmission systems. Parasitic capacitance is the major factor limiting the band-width, especially for low-power amplifiers. To enhance the band-width, a negative feedback[ll or peaking technique [Z] is Widely used. However. these techniques enhance the band-width with the ......
#Differential amplifiers #Parasitic capacitance #Gain #Optical fiber amplifiers #Resistors #Resistance #Frequency measurement
Analog-to-digital converter with non-linear capacitor compensation
Symposium 1989 on VLSI Circuits - - 1989
One of the sources of non-linearity in charge-redistribution analog-to-digital converters (ADCs) is capacitor voltage dependence. This paper will discuss Circuit techniques lo eliminate conversion errors caused by the capacitor voltage dependence, and performance data from circuits realized in a linear CMOS process will be presented.
#Capacitors #Signal generators #Registers #Linearity #Topology #MOS capacitors #Integrated circuit modeling
The stabilized reference-line (SRL) technique for scaled DRAMs
Symposium 1989 on VLSI Circuits - - 1989
Recently it has been reported that bitline interference noise increases with DRAM integration and that reduction of this noise is the key issue to realizing 16Mb DRAMs and beyond.(l) In order to reduce this interference noise.
#Interference #Random access memory #Generators #Noise measurement #Couplings #Clocks #Capacitance
A 2 GHz clock direct frequency synthesiser
Symposium 1989 on VLSI Circuits - - 1989
First results are now available on a U.H.F. capable Direct Frequency Synthesiser, (DFS) which is primarily intended for radar and E.W. applications. The device generates square, mangle and sine wave outputs, me and complement, phase and quadrature, over the range 1Hz to 500MHz.
#Clocks #Synthesizers #Read only memory #Frequency synthesizers #Transistors #Phase locked loops #Performance evaluation
CMOS subnanosecond true-ECL output buffer
Symposium 1989 on VLSI Circuits - - 1989
This paper presents, for the first time, a CMOS output buffer circuit compatible with standard ECL lOOk systems and not needing external components or additional supply voltages. High speed (0.9 ns delay), sufficient precision and good pulse-response are achieved through use of a new circuit principle. The circuit has been fabricated in an 0.7 μm memory process.
#Transistors #Delays #Capacitance #Logic gates #Circuit stability #Voltage measurement #Transmission line measurements
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