A novel memory cell architecture for high-density DRAMs

Symposium 1989 on VLSI Circuits - 1989
Ohta1, Mimoto1, Torimaru1, Miyake1
1VLSI Development Laboratory, IC Group SHARP Corporation, Tenri, Japan

Tóm tắt

Constant efforts have been made to reduce the number of elements used for memory cell in high density DRAMs. However, despite these efforts, the 2-element cell (1 transistor and 1 capacitor per bit) has been widely used since 1970's(Reference [1]).

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#Computer architecture #Microprocessors #Sensors #Vertical cavity surface emitting lasers #Random access memory #Clocks #Nickel

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Symposium 1989 on VLSI Circuits

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