High-reliability and high-speed design of 1Mb CMOS SRAM with 0.5/spl mu/m devices - 1989
Hayakawa, Kakumu, Aono, Yoshida, Sato, Noguchu, Ohtani, Nakayama, Asami, Morita, Kinugawa, Matsunaga, Ochit
#Random access memory #Logic gates #Computer architecture #Microprocessors #Delays #Organizations #Decoding
High performance BiCMOS circuit technology VLSI gate arrays - 1989
Gallia, Yee, Chau, Wang, Davis, Moore, Chas, Lemonds, Eklund, Havemann, Bonifield, Graham, Pozadzides, Shah
#Logic gates #BiCMOS integrated circuits #Transistors #Delays #Capacitance #Integrated circuit interconnections #Layout
An expermental 16Mb DRAM with reduced peak-current noise - 1989
Daeje Chin, Changhyun Kim, Yun H. Choi, Dong S. Min, Hong S. Hwang, Hoon Choi, Soo I. Cho, Tae Y. Chung, Chan J. Park, Yoon S. Shin, Kwangpyuk Suh, Yong F. Park
#Random access memory #Sensors #Transistors #Latches #Process control #Photomicrography #Metals