Symposium 1989 on VLSI Circuits
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An 8 bit, 200 MHz BiCMOS comparator
- 1989
A BiCMOS comparator intended for use in low-power, high-speed analog-t-digital conversion systems operating at video frequencies and above is described. An experimental version of the comparator integrated in a 1μm BiCMOS technology performs comparisons at mtes up to 200 MHE.
#Voltage measurement #BiCMOS integrated circuits #Capacitors #Clocks #Switches #Frequency measurement #Latches
Design of optically coupled three dimensional common memory for parallel processor system
- 1989
The optically coupled three-dimensional common memory (called 3D-OCC memory hereafter) ia a newly proposed intelligent memory for high speed parallel processing in computation [l].
#High-speed optical techniques #Adaptive optics #Optical coupling #Optical buffering #Light emitting diodes #Signal detection #Microprocessors
Soft-error characteristics in bipolar memory cells with small critical charge
- 1989
In this paper, first, the contribution of charge collected at the base and the collector to soft-error is investigated using computer simulation. Next, an effective charge model incorporating weight coefficients is proposed.
#Sensitivity #Random access memory #Integrated circuit modeling #Life estimation #Discharges (electric) #Computational modeling #Alpha particles
Automatic gain control (AGC) circuit for high density BiCMOS SRAM
- 1989
In this paper an Automatic Gain Control (AGC) circuit is discussed. This AGC circuit is applied to a high speed BiCMOS SRAM bitline scheme to control the bitline voltage swings so that they are independent of temperature, operation and process variations.
#BiCMOS integrated circuits #Random access memory #Gain control #Voltage control #Transistors #Operational amplifiers #Resistors
A 68ns 4Mbit CMOS EPROM with high noise immunity design
- 1989
High speed non-volatile memories with large bit density have been required for high performance micro-processor systems. Sub 100ns-access time 4Mbit EPROMs[1], [2] have been, developed to meet the marlre1 needs.
#EPROM #Capacitance #Dams #Logic gates #Threshold voltage #Sensors #Delays
High performance VLSI processor architectures
- 1989
Single-chip processor performance has improved dramatically since the inception of the four-bit microprocessor in 1971. This is due in part to technological advances (i.e., faster devices and greater device density), but also because of the adoption of architectural approaches well suited to the opportunities and limitations of VLSI. These approaches reduce off-chip memory accesses and admit of a ......
#Instruction sets #Pipeline processing #Clocks #Transistors #Complexity theory #Registers #Computer architecture
11.5ns 1M x 1/256K x 4TTL BiCMOS SRAM's with voltage- and temperature-compensated interfaces
- 1989
In high speed SRAM's a ground bounce noise caused by package lead inductance is serious limitation of access time.
#Random access memory #BiCMOS integrated circuits #Temperature dependence #Delays #Current mirrors #Thermal stability #Photomicrography
Fuzzy logic hardware systems
- 1989
Novel fuzzy microprocessors are described, which achieve fuzzy inference with deterministic input and output signals. These two kinds of fuzzy microprocessors are useful for constructing sophisticated fuzzy logic controller. One is a rule chip and the other is a defuzzifier chip. The former is in the monolithic form and the latter is in hybrid structure. These fuzzy microprocessors will rapidly pe......
#Fuzzy logic #Linguistics #Logic gates #Transistors #Resistors #Microprocessors #Voltage control
CMOS subnanosecond true-ECL output buffer
- 1989
This paper presents, for the first time, a CMOS output buffer circuit compatible with standard ECL lOOk systems and not needing external components or additional supply voltages. High speed (0.9 ns delay), sufficient precision and good pulse-response are achieved through use of a new circuit principle. The circuit has been fabricated in an 0.7 μm memory process.
#Transistors #Delays #Capacitance #Logic gates #Circuit stability #Voltage measurement #Transmission line measurements
A self-timed dynamic sensing scheme for 5V only multi-Mb flash E/sup 2/PROMs
- 1989
In recent years, several types of flash E'PROM have been proposed to enhance the density of electrically alterable non-volatile memories. However, shrinking the memory cell causes the reduction of the cell current, 80 that a sensitive sensing scheme has been required, which replaces the conventional current sensing. A simultaneous multi-bit reading is also necessary for L high speed serial and pag......
#Sensors #Flip-flops #Timing #Electric potential #Current measurement #Size measurement #Semiconductor device measurement