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Symposium 1989 on VLSI Circuits

 

 

 

 

Cơ quản chủ quản:  N/A

Các bài báo tiêu biểu

An 8 bit, 200 MHz BiCMOS comparator
- 1989
Lim, Wooley
#Voltage measurement #BiCMOS integrated circuits #Capacitors #Clocks #Switches #Frequency measurement #Latches
A multi bit test trigger circuit for Mbit SRAM's
- 1989
Miyaji, Emort, Matsuyama, Kanaishi, Senoh, Hagiwara
#Trigger circuits #Testing #Random access memory #Heterojunction bipolar transistors #Pins #Organizations #CMOS technology
A self-timed dynamic sensing scheme for 5V only multi-Mb flash E/sup 2/PROMs
- 1989
Kobayashi, Nakayama, Hayashikoshi, Miyawaki, Terada, Arima, Matsukawa, Yoshihara
#Sensors #Flip-flops #Timing #Electric potential #Current measurement #Size measurement #Semiconductor device measurement
A new staggered virtual ground array architecture implemented in a 4Mb CMOS EPROM
- 1989
All, Nguyen, Sani, Shubat, Hu, Me, Kazarounian, Eltan
#EPROM #Logic gates #III-V semiconductor materials #Aluminum nitride #Tungsten #CMOS technology #Throughput
Improving bandwidth and error rate in flash converters
- 1989
Mangelsdorf
#Error analysis #Latches #Error correction #Clocks #Capacitance #Read only memory #Measurement uncertainty
High-reliability and high-speed design of 1Mb CMOS SRAM with 0.5/spl mu/m devices
- 1989
Hayakawa, Kakumu, Aono, Yoshida, Sato, Noguchu, Ohtani, Nakayama, Asami, Morita, Kinugawa, Matsunaga, Ochit
#Random access memory #Logic gates #Computer architecture #Microprocessors #Delays #Organizations #Decoding
Programmable vector-matrix multipliers for artificial neural networks
- 1989
Kub, Mack, Moon
#Differential amplifiers #Logic gates #Linearity #Capacitors #Impedance #Very large scale integration #MOSFET
High performance BiCMOS circuit technology VLSI gate arrays
- 1989
Gallia, Yee, Chau, Wang, Davis, Moore, Chas, Lemonds, Eklund, Havemann, Bonifield, Graham, Pozadzides, Shah
#Logic gates #BiCMOS integrated circuits #Transistors #Delays #Capacitance #Integrated circuit interconnections #Layout
ALTICS: an advanced timing analysis system for VLSI
- 1989
Yamauchi, Sakuma, Fujinami, Takamizawa
#Clocks #Delays #Flip-flops #Central Processing Unit #Optimization #Wires #Synchronization
An expermental 16Mb DRAM with reduced peak-current noise
- 1989
Daeje Chin, Changhyun Kim, Yun H. Choi, Dong S. Min, Hong S. Hwang, Hoon Choi, Soo I. Cho, Tae Y. Chung, Chan J. Park, Yoon S. Shin, Kwangpyuk Suh, Yong F. Park
#Random access memory #Sensors #Transistors #Latches #Process control #Photomicrography #Metals