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International Conference on Simulation of Semiconductor Processes and Devices

 

 

 

 

Cơ quản chủ quản:  N/A

Các bài báo tiêu biểu

Transistor width dependence of LER degradation to CMOS device characteristics
- Trang 95-98
J. Wu, Jihong Chen, Kaiping Liu
When transistor gate length is scaled down, the impact of transistor poly gate line edge roughness (LER) on device characteristics becomes significant. In this work, we study the dependence on transistor width of the low spatial frequency LER induced CMOS device Ion/Ioff degradations, based on TCAD simulation results and silicon data. Methodology to account for LER effects in device optimization i... hiện toàn bộ
#Degradation #Scattering #Clouds #Intrusion detection #Silicon #Frequency #Optimization methods #Shape #CMOS technology #Instruments
Bias-dependent drift resistance modeling for accurate DC and AC simulation of asymmetric HV-MOSFET
- Trang 203-206
N. Hefyene, E. Vestiel, B. Bakeroot, C. Anghel, S. Frere, A.M. Ionescu, R. Gillon
A detailed investigation of the drift resistance evolution with the gate and drain biases in Lateral DMOS architectures is reported. The extractions are performed using the concept of intrinsic drain voltage, V/sub K/, applied to both simulated and measured data. Some new special test structures (MESDRIFT) have been designed and fabricated in order to investigate the DMOS bias-dependent drift resi... hiện toàn bộ
#Voltage #MOSFETs #Electrical resistance measurement #Testing #Analytical models #Numerical simulation #Integrated circuit modeling #CMOS technology #Data mining #Performance evaluation
3D MOSFET simulation considering long-range Coulomb potential effects for analyzing statistical dopant-induced fluctuations associated with atomistic process simulator
- Trang 91-94
T. Ezaki, T. Ikezawa, A. Notsu, K. Tanaka, M. Hane
We have developed a realistic 3-D process/device simulation method for investigating the fluctuation in device characteristics induced by the statistical nature of the number and position of discrete dopant atoms. We used it to investigate the variations in characteristics of a sub-100 nm CMOS device induced by realistic dopant fluctuations considering practical device fabrication processes. In pa... hiện toàn bộ
#MOSFET circuits #Analytical models #Fluctuations #Predictive models #Atomic layer deposition #Impurities #Convergence #Lakes #Silicon #CMOS process
Hot carrier induced degradation due to multi-phonon mechanism analyzed by lattice and device Monte Carlo coupled simulation
- Trang 243-246
S. Ho, Y. Ohkura, M. Takuya, J. Prasad, N. Nakamura, S. Kubo
A new multi-phonon model for hydrogen desorption at Si/SiO/sub 2/ interface due to hot carriers is proposed for a multi-scale simulation, in which Lattice Monte Cairo method is coupled with Device Monte Cairo method by using a mediator-based common software platform. The power law between interface trap density and time (N/sub it//spl prop/t/sup a/) is demonstrated which shows good agreement with ... hiện toàn bộ
#Hot carriers #Degradation #Lattices #Analytical models #Electrons #Particle scattering #Monte Carlo methods #Phonons #Electrodes #Hydrogen
A new gate current model accounting for a non-Maxwellian electron energy distribution function
- Trang 235-238
A. Gehring, T. Grasser, H. Kosina, S. Selberherr
We report on a new formulation to describe hot electron injection through gate dielectrics. It is based on an expression which accounts for the non-Maxwellian shape of the electron energy distribution function. We use the first three even moments of the Boltzmann equation n, T/sub n/, and /spl beta//sub n/ found by the solution of a six moments transport model to describe the shape of the distribu... hiện toàn bộ
#Distribution functions #Shape #Tunneling #Monte Carlo methods #MOSFET circuits #Secondary generated hot electron injection #Tail #Lattices #Temperature distribution #Microelectronics
Simulation of a "Well Tempered" SOI MOSFET using an enhanced hydrodynamic transport model
- Trang 195-198
M. Gritsch, H. Kosina, T. Grasser, S. Selberherr
Anomalous output characteristics are observed in hydrodynamic simulations of partially depleted SOI MOSFETs. The effect that the drain current reaches a maximum and then decreases is peculiar to the hydrodynamic transport model. It is not observed in drift-diffusion simulations and its occurrence in measurements is questionable. An explanation of the cause of this effect is given, and a solution i... hiện toàn bộ
#MOSFET circuits #Hydrodynamics #High definition video #Equations #Ocean temperature #Hot carriers #Computational modeling #Microelectronics #Voltage #Current measurement
Mô phỏng số hàm sóng hai hạt trong các dây lượng tử Dịch bởi AI
- Trang 175-178
S. Reggiani, A. Bertoni, M. Rudan
Vì yêu cầu chính của máy tính lượng tử là việc tạo ra và khai thác sự ràng buộc, một nghiên cứu chi tiết về các trạng thái liên kết đã được thực hiện dựa trên một hệ thống rắn dựa trên các dây lượng tử liên kết. Đầu tiên, một tổng quan ngắn gọn về các cổng cơ bản được cung cấp, dựa trên các nghiên cứu sơ bộ, tiếp theo là phân tích các electron di chuyển dọc theo các dây lượng tử liên kết. Động lực... hiện toàn bộ
#Numerical simulation #Wave functions #Wires #Electrons #Quantum computing #Quantum entanglement #Schrodinger equation #Coupling circuits #Circuit simulation #Analytical models
Integrated TCAD and ECAD solutions - a paradigm shift
- Trang 5-8
Shiuh-Wuu Lee
This paper highlights the emerging need for selective integration of physical-model based TCAD modeling and simulation tools that have been mostly applied to technology development with ECAD tools that have been traditionally used for product design. The emerging technology trends that lead to this paradigm shift are highlighted. The architecture and requirements of integrated TCAD-ECAD solutions ... hiện toàn bộ
#Electronic design automation and methodology #Product design #Numerical models #Solid modeling #Lithography #Integrated circuit interconnections #Frequency #Educational institutions #P-n junctions #Energy consumption
Characterization of multi-barrier tunneling diodes and vertical transistors using 2-D device simulation
- Trang 167-170
Kwan-Do Kim, Keun-Ho Lee, Seung-Jae Baik, Jun-Ha Lee, Tai-Kyung Kim, Jeong-Taek Kong
A novel memory cell which adopts a floating gate device with the writing mechanism of direct tunneling through the multiple tunnel junction(MTJ) was proposed recently. The device is known to have potential advantages of scalability, high density, high speed, long data retention time, low voltage operation, low power consumption and good endurability. Characterization and optimization of the vertic... hiện toàn bộ
#Diodes #Nonvolatile memory #Writing #Scalability #Low voltage #Energy consumption #Magnetic tunneling #Numerical analysis #Guidelines #Fabrication
MOSFET hot-carrier induced gate current simulation by self-consistent silicon/oxide Monte Carlo device simulation
- Trang 231-234
A. Ghetti
Hot electron transport in MOS transistors is investigated by means of a coupled silicon/oxide Monte Carlo (MC) simulation. First, a new MC simulator able to handle selfconsistently different materials is developed. Then, the impact of oxide transport on the gate current (I/sub G/) is analyzed comparing different injection models with experiments. It is shown that oxide transport plays an important... hiện toàn bộ
#MOSFET circuits #Hot carriers #Silicon #Monte Carlo methods #Integrated circuit modeling #Scattering #Potential well #Voltage #Electron emission #Computational modeling