TCAD driven drain engineering for hot carrier reduction of 3.3V I/O p-MOSFET

International Conference on Simulation of Semiconductor Processes and Devices - Trang 47-50
N. Miura1, H. Hayashi1, H. Komatsubara1, A. Mochizuki1, K. Fukuda1
1System LSI Research Division, Oki Electric Industry Company Limited, Hachioji, Tokyo, Japan

Tóm tắt

We present a TCAD driven hot carrier reduction methodology of 3.3V I/O p-MOSFETs design. The drain structures are successfully optimized in short time by applications of TCAD local models. Considering tradeoffs between hot carrier injection (HCI) and I/sub ON/, HALO/SDE of both core and I/O transistors can be totally optimized for photo-mask reduction.

Từ khóa

#Hot carriers #MOSFET circuits #Electron traps #Human computer interaction #Charge carrier processes #Drain avalanche hot carrier injection #Hot carrier injection #Degradation #Design optimization #Calibration

Tài liệu tham khảo

nishida, 2001, IEDM Tech Dig T39_4 kimizuka, 1999, Symp VLSI Tech, 73
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International Conference on Simulation of Semiconductor Processes and Devices

47-50

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