O. Cueto1, F. Charlet1, A. Farcy2
1CEA-DRT-LETI/DTS-CEA/GRE, Grenoble, France
2STMicroelectronics, Crolles, France
Tóm tắt
With the inclusion of floating conductors in integrated circuits, conventional simulation tools exhibit prohibitive calculation times. A new simulation tool, called ICARE, was developed to extract efficiently the 3D capacitance matrix of interconnect structures embedded in a multi-layered dielectric environment. Using the so-called fictitious domain method, it leads to a coupled linear system, with the potential on a regular 3D grid of a simple-shaped domain, including the dielectric media and the charge on a mesh of the conductor surfaces as unknowns. A specific adaptation of this numerical method is introduced, giving the possibility of taking into account the floating conductors in an efficient way. As a result, realistic structures, consisting of one or two conducting lines surrounded by a great number of floating conductors, are simulated.