International Conference on Simulation of Semiconductor Processes and Devices
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On the large-signal CMOS modeling and parameter extraction for RF applications
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 67-70
A small-signal equivalent circuit of an RF MOSFET not only fully compatible with 4 terminal large-signal quasi-static I-V and Q-V models but suitable for 3 terminal two-port s-parameter measurement, is proposed along with very simple and accurate parameter extraction method. This model includes the intrinsic and extrinsic elements important for AC simulation at RF. The validity and accuracy of our......
#Semiconductor device modeling #Parameter extraction #Radio frequency #Equivalent circuits #MOSFET circuits #Scattering parameters #Capacitance #Integrated circuit modeling #Circuit simulation #Data mining
Realistic scaling scenario for sub-100nm embedded SRAM based on 3-dimensional interconnect simulation
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 63-66
It is still an open problem to elucidate the scaling merit of the embedded SRAM with the Low Operating Power (LOP) MOSFET's fabrication in 50, 70 and 100nm CMOS technology node. Taking into account the realistic SRAM cell layout, we evaluate the parasitic capacitance of Bit Line (BL) as well as Word Line (WL) in each generation. By means of 3-Dimensional (3D) interconnect simulator (Raphael), we f......
#Random access memory #CMOS technology #Integrated circuit interconnections #Delay #Parasitic capacitance #Plugs #Circuit simulation #Large scale integration #Ultra large scale integration #Fabrication
Analysis of injection current with electron temperature for high-K gate stacks
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 239-242
Though, high dielectric constant material is a possible near future candidate to suppress gate current densities of MOSFETs, the barrier height generally decreases with increasing dielectric constant. In this paper, the injection current through gate stacks has been calculated while taking into account the electron temperature using the W.K.B. method to understand the impact of the injection curre......
#Electrons #Temperature #High K dielectric materials #High-K gate dielectrics #Current density #Silicon #MOSFETs #Probability #Dielectric constant #Tunneling
Ensemble Monte Carlo/molecular dynamics simulation of inversion layer mobility in Si MOSFETs - effects of substrate impurity
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 25-28
Electron transport in bulk Si and MOSFET inversion layers is studied using an ensemble Monte Carlo (EMC) technique coupled with the molecular dynamics (MD) method. The Coulomb interactions among point charges (electrons and negative ions) are directly taken into account in the simulation. It is demonstrated that the static screening of Coulomb interactions is correctly simulated by the EMC/MD meth......
#Monte Carlo methods #MOSFETs #Electromagnetic compatibility #Electron mobility #Substrates #Impurities #Particle scattering #Information systems #FETs #Threshold voltage
Finite element analysis of stress evolution in Si based front and back ends micro structures
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 247-252
Nowadays, silicon technologies with feature sizes around 100 nm are used in the microelectronics industry to produce gigabits integrated circuits. The prime part of numerical simulation in their development is now well established. One of the purpose of the numerical analyses is the improvement of the mechanical reliability. We synthetize in this paper various works we have performed on the macros......
#Finite element methods #Stress #Silicon #Manufacturing #Microelectronics #Numerical simulation #Geometry #Numerical models #Electron beams #Predictive models
A new gate current model accounting for a non-Maxwellian electron energy distribution function
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 235-238
We report on a new formulation to describe hot electron injection through gate dielectrics. It is based on an expression which accounts for the non-Maxwellian shape of the electron energy distribution function. We use the first three even moments of the Boltzmann equation n, T/sub n/, and /spl beta//sub n/ found by the solution of a six moments transport model to describe the shape of the distribu......
#Distribution functions #Shape #Tunneling #Monte Carlo methods #MOSFET circuits #Secondary generated hot electron injection #Tail #Lattices #Temperature distribution #Microelectronics
An efficient algorithm for 3D interconnect capacitance extraction considering floating conductors
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 107-110
With the inclusion of floating conductors in integrated circuits, conventional simulation tools exhibit prohibitive calculation times. A new simulation tool, called ICARE, was developed to extract efficiently the 3D capacitance matrix of interconnect structures embedded in a multi-layered dielectric environment. Using the so-called fictitious domain method, it leads to a coupled linear system, wit......
#Conductors #Dielectrics #Integrated circuit interconnections #Boundary conditions #Parasitic capacitance #Lagrangian functions #Integrated circuit modeling #Circuit simulation #Linear systems #Electric variables
Hot-carrier energy distribution model and its application to the MOSFET substrate current
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 171-173
The lack of information for carrier energy distributions in the continuum drift-diffusion (DD) or hydro-dynamic (HD) device simulation has been a major obstacle in simulating the physical phenomena related to hot carriers. In this study, a practical construction method of the hot-carrier energy distribution is proposed. Results from Monte-Carlo (MC) simulation in the uniform field distribution are......
#Hot carriers #MOSFET circuits #Electrons #Impact ionization #Computational modeling #Substrates #High definition video #Integrated circuit modeling #Power engineering and energy #Circuit simulation
"What can computer aided engineering do for the SoC era ?"
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 211-211 - 2002
TCAD has contributed to processldevice design and prediction of the device performances for decades. This role is still very important in very deep submicron process; however, new aspect in the semiconductor industry has arisen. Interconnect issue becomes more critical in SoC timing closure. ITRS roadmap predicts future of processldevices and interconnects, which lead to a standardized process and......
#Computer aided engineering #Timing #National electric code #Process design #Electronics industry #Technological innovation
A new SP (simultaneous polishing) model for copper CMP process
International Conference on Simulation of Semiconductor Processes and Devices - - Trang 257-260
For the copper damascene process, dummy fill is used to improve over-polishing problems such as dishing and erosion. Dummy placement based on design rules is ordinary used, but to improve the efficiency of the dummy fill, model-based design is necessary So, we have developed a new SP (simultaneous, polishing) model for Cu-CMP and developed a dummy pattern design system to utilize the model. Using ......
#Copper #Stress #Equations #Accuracy #Testing #Electronic design automation and methodology #Electronic mail #Frequency #Convolution
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