A novel implementation of combined systolic and folded architectures for adaptive filters in FPGA

Microprocessors and Microsystems - Tập 74 - Trang 103018 - 2020
Gomathi Swaminathan1, G. Murugesan1, S. Sasikala1, L. Murali2
1Department of ECE, Kongu Engineering College, Perundurai, Tamil Nadu, India
2Department of ECE, P.A. College Engineering and Technology, Pollachi, Tamil Nadu, India

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Microprocessors and Microsystems

Tập 74

103018

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