Sheet resistance and layout effects in accelerated tests for dielectric reliability evaluation

Microelectronics Journal - Tập 27 - Trang 675-685 - 1996
F. Pio1
1SGS-THOMSON Microelectronics - Central R&D, Via C. Olivetti, 2, I-20041 Agrate, Italy. Tel: (+39) 39-6035692. Fax: (+39) 39-6035233

Tài liệu tham khảo

Iniewski, 1989, Series resistance in a MOS capacitor with a thin gate oxide, Solid State Electron., 32, 137, 10.1016/0038-1101(89)90180-9

Berman, 1981, Time zero dielectric reliability test by a ramp method, 204

Lee, 1988, Modeling and characterization of gate oxide reliability, IEEE Trans. Electron Devices, 35, 2268, 10.1109/16.8802

Moazzami, 1990, Projecting gate oxide reliability and optimizing reliability screens, IEEE Trans. Electron Devices, 37, 1643, 10.1109/16.55751

Vollertsen, 1992, A new approach of statistical modelling the time dependent oxide breakdown, 97

Pio, 1992, Series resistance effects in thin oxide capacitor evaluation, IEEE Electron Devices Lett., 13, 544, 10.1109/55.192827

Pio, 1993, Influence of series resistance in oxide parameter extraction from accelerated tests data, Microelectronics J., 24, 445, 10.1016/0026-2692(93)90051-F

Harari, 1977, Conduction and trapping of electrons in highly stressed ultrathin films of thermal SiO2, Appl. Phys.Lett., 30, 601, 10.1063/1.89252

Harari, 1978, Dielectric breakdown in electrically stressed thin films of thermal SiO2, J. Appl. Phys., 49, 2478, 10.1063/1.325096

Dumin, 1995, High field emission related thin oxide wearout and breakdown, IEEE Trans. Electron. Devices, ED-42, 760, 10.1109/16.372082