Impact of technology scaling and process variations on RF CMOS devices
Tài liệu tham khảo
H.-S. Wong, D. Frank, P. Solomon, C. Wann, and J. Welser, “Nanoscale CMOS,” Proc. IEEE, vol. 87, no. 4, pp. 537-570, Apr. 1999.
University of California at Berkeley. Predective Technology Model. [Online]. Available: http://www-device.eecs.berkeley.edu/∼ptm/.
University of California at Berkeley. Predective Technology Model. BSIM4 SPICE MOS Device Model for Circuit Design. [Online]. Available: http://www-device.eecs.berkeley.edu/∼bsim3/bsim4.html.
International Technology Roadmap for Semiconductors 2003. Radio Frequency and Analog/Mixed-Signal Technologies for Wireless Communities. [Online]. Available: http://public.itrs.net.
Y. Tsividis, Operation and Modeling of the MOS Transistor. McGraw-Hill, 1987.
D. Boning and S. Nassif, “Models of Process Variations in Device and Interconnect,” in Design of High-Performance Microprocessors Circuits, A. Chandrakasan, W. Bowhill, and F. Fox, Eds. New York, USA: IEEE Press, 2000, ch. 6, pp. 98-115.