A two-dimensional semi-analytical analysis of the subthreshold-swing behavior including free carriers and interfacial traps effects for nanoscale double-gate MOSFETs
Tài liệu tham khảo
Diagne, 2008, Explicit compact model for symmetric double-gate MOSFETs including solutions for small-geometry effects, Solid-State Electron., 52, 99, 10.1016/j.sse.2007.06.020
Djeffal, 2007, An approach based on neural computation to simulate the nanoscale CMOS circuits: application to the simulation of CMOS inverter, Solid-State Electron., 51, 48, 10.1016/j.sse.2006.12.004
Djeffal, 2007, Design and simulation of a nanoelectronics DG MOSFET current source using artificial neural networks, Mater. Sci. Eng. C, 27, 1111, 10.1016/j.msec.2006.09.005
Ghoggali, 2010, Analytical analysis of nanoscale double-gate MOSFETs including the hot-carrier degradation effects, Int. J. Electron., 97, 119, 10.1080/00207210902894746
Djeffal, 2009, Analytical analysis of nanoscale multiple gate MOSFETs including effects of hot-carrier induced interface charges, Microelectron. Reliab., 49, 377, 10.1016/j.microrel.2008.12.011
Leblebici, 1992, Modeling of nMOS transistors for simulation of hot-carrier induced device and circuit degradation, IEEE Trans. Comput. Aided Des., 11, 235, 10.1109/43.124402
Ioannidis, 2011, Effect of localized interface charge on the threshold voltage of short-channel undoped symmetrical double-gate MOSFETs, IEEE Trans. Electron Devices, 58, 433, 10.1109/TED.2010.2093528
ATLAS: 2D Device Simulator, SILVACO International, 2008.
Munteanu, 2006, Quantum short-channel compact modeling of drain current in double-gate MOSFET, Solid-State Electron., 50, 680, 10.1016/j.sse.2006.03.038
Tsormpatzoglou, 2007, Semi-analytical modeling of short-channel effects in Si and Ge symmetrical double-gate MOSFETs, IEEE Trans. Electron Devices, 54, 1943, 10.1109/TED.2007.901075
K.M. Cao, W. Liu, X. Jin, K. Green, J. Krick, T. Vrotsos, C. Hu, Modeling of pocket implanted MOSFETs for anomalous analog behavior, in: IEDM Technical Digest, 1999, pp. 171–174.
