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Instruction-Based Self-Testing of Processor Cores
Springer Science and Business Media LLC - Tập 19 - Trang 103-112 - 2003
Nektarios Kranitis, Antonis Paschalis, Dimitris Gizopoulos, Yervant Zorian
Software based self-testing of embedded processor cores provides an excellent technique for balancing the testing effort for complex Systems-on-Chip (SoC) between slow, inexpensive external testers and embedded code stored in memory cores. In this paper we propose an efficient methodology for processor core self-testing based on the knowledge of its instruction set architecture and register transf... hiện toàn bộ
A Routability-Aware Algorithm for Both Global and Local Interconnect Resource Test and Diagnosis of Xilinx SRAM-FPGAs
Springer Science and Business Media LLC - Tập 32 - Trang 749-762 - 2016
Aiwu Ruan, Haiyang Huang, Jingwu Wang, Yifan Zhao
With increasing scale of Field Programmable Gate Arrays (FPGAs), architecture of interconnect resources (IRs) in FPGA is becoming more and more complicated. IR testing plays an important role to guarantee correct functionality of FPGAs. Usually, architecture of Global IRs is regular, while architecture of Local IRs is more complicated compared to Global IRs. In the paper, a generic IR model reveal... hiện toàn bộ
A Built-in Single Event Upsets Detector for Sequential Cells
Springer Science and Business Media LLC - Tập 32 - Trang 11-20 - 2015
Yuanqing Li, Haibin Wang, Lixiang Li, Li Chen, Rui Liu, Mo Chen
A built-in single event upsets (SEUs) detector is presented in this paper. This detector utilizes charge sharing to detect an SEU in a sequential cell, and the detection process is analyzed through Accuro simulations in a 65 nm technology. The normal operation of this detector would not induce obvious performance degradation of the target circuit. Through using this detector, error correction can ... hiện toàn bộ
A Low-Cost Jitter Measurement Technique for BIST Applications
Springer Science and Business Media LLC - Tập 22 - Trang 219-228 - 2006
Jiun-Lang Huang, Jui-Jer Huang, Yuan-Shuang Liu
In this paper, we present a BIST technique that measures the RMS value of a Gaussian distribution period jitter. In the proposed approach, the signal under test is delayed by two different delay values and the probabilities it leads the two delayed signals are measured. The RMS jitter can then be derived from the probabilities and the delay values. Behavior and circuit simulations are performed to... hiện toàn bộ
Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips
Springer Science and Business Media LLC - Tập 19 - Trang 407-416 - 2003
Sandeep Kumar Goel, Bart Vermeulen
To debug a digital chip with a scan-based debug methodology, the chip is stopped at a certain point in time in the application. The states of the flip-flops and the memory elements are observed and compared with the simulation results. If the chip contains multiple clock domains then these clock domains must be stopped simultaneously, otherwise some of the elements in one or more of the clock doma... hiện toàn bộ
An optimal algorithm for cycle breaking in directed graphs
Springer Science and Business Media LLC - Tập 7 - Trang 71-81 - 1995
Tatiana Orenstein, Zvi Kohavi, Irith Pomeranz
This paper describes an exact algorithm for the identification of a minimal feedback vertex set in digital circuits. The proposed algorithm makes use of graph reduction and efficient graph partitioning methods based on local properties of digital circuits. It has been implemented and applied to ISCAS-89 benchmark circuits. Previously, non-optimum solutions were found. In other cases, the optimalit... hiện toàn bộ
Delivering Dependable Telecommunication Services Using Off-the-Shelf System Components
Springer Science and Business Media LLC - Tập 12 - Trang 153-159 - 1998
Y. Levendel
For decades, traditional telecommunication systems have reliably delivered telephony services using expensive equipment and software. In spite of large R&D expenses, the end customer costs remained low due to the amortization of the equipment over a large population of users. With the advent of low cost and high performance computers, it has become conceivable to deliver similar and more powerful ... hiện toàn bộ
Analysis of Test Application Time for Test Data Compression Methods Based on Compression Codes
Springer Science and Business Media LLC - Tập 20 Số 2 - Trang 199-212 - 2004
Anshuman Chandra, Krishnendu Chakrabarty
Low-Cost Concurrent Error Detection for GCM and CCM
Springer Science and Business Media LLC - Tập 30 - Trang 725-737 - 2014
Xiaofei Guo, Ramesh Karri
In many applications, encryption alone does not provide enough security. To enhance security, dedicated authenticated encryption (AE) mode are invented. Galios Counter Mode (GCM) and Counter with CBC-MAC mode (CCM) are the AE modes recommended by the National Institute of Standards and Technology. To support high data rates, AE modes are usually implemented in hardware. However, natural faults red... hiện toàn bộ
Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor
Springer Science and Business Media LLC - - 2002
Abhijit Jas, Nur A. Touba
A novel approach for using an embedded processor to aid in deterministic testing of the other components of a system-on-a-chip (SOC) is presented. The tester loads a program along with compressed test data into the processor's on-chip memory. The processor executes the program which decompresses the test data and applies it to scan chains in the other components of the SOC to test them. The progra... hiện toàn bộ
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