IntroductionJournal of VLSI signal processing systems for signal, image and video technology - Tập 4 - Trang 95-96 - 1992
Kung Yao
Real-time high-energy physics applications on DECPeRLe-1 programmable active memoryJournal of VLSI signal processing systems for signal, image and video technology - Tập 12 - Trang 21-33 - 1996
Laurent Moll, Jean Vuillemin, Philippe Boucard, Lars Lundheim
The future Large Hadron Collider (LHC) to be built at CERN1 by the turn of the millenium, provides an ample source of challenging real-time computational problems. We report here some results from a collaboration between CERN EAST2 (RD-11) group and DEC-PRL PAM3 team. We present implementations of the four foremost LHC algorithms on DECPeRLe-1 [1]. Our machine is the only one which presently meets...... hiện toàn bộ
Bidiagonalization and symmetric tridiagonalization by systolic arraysJournal of VLSI signal processing systems for signal, image and video technology - Tập 1 - Trang 279-285 - 1990
R. Schreiber
We give a systolic algorithm and array for bidiagonalization of ann × n matrix inO(n logn) time, usingO(n
2) cells. Bandedness of the input matrix may be effectively exploited. If the matrix is banded, withp nonzero subdiagonals andq nonzero superdiagonals, then 4n ln(p+q)+O(n) clocks and 2n(p+q)+O((p+q)
2+n) cells are needed. This is faster than the best previously reported result by the factor l...... hiện toàn bộ
Error detection in arrays via dependency graphsJournal of VLSI signal processing systems for signal, image and video technology - Tập 4 - Trang 331-342 - 1992
Edwin Hsing-Mean Sha, Kenneth Steiglitz
This paper describes a methodology based on dependency graphs for doing concurrent run-time error detection in systolic arrays and wavefront processors. It combines the projection method of deriving systolic arrays from dependency graphs with the idea of input-triggered testing. We call the method ITRED, forInput-driven Time-Redundancy Error Detection. Tests are triggered by inserting special symb...... hiện toàn bộ
A Configurable Architecture for the Wavelet Packet TransformJournal of VLSI signal processing systems for signal, image and video technology - Tập 32 - Trang 255-273 - 2002
María A. Trenas, Juan López, Emilio L. Zapata, Francisco Argüello
The standard Wavelet Transform (WT) has a wide range of applications, from signal analysis to image or video compression and communications. Most of these applications would be benefited if the transform provided good spectral and temporal resolution in arbitrary regions of the time-frequency plane. This flexible choice of the time-frequency tiling is provided by the Wavelet Packet Transform (WPT)...... hiện toàn bộ
A million transistor systolic array graphics engineJournal of VLSI signal processing systems for signal, image and video technology - Tập 1 - Trang 35-43 - 1989
Nader Gharachorloo, Satish Gupta, Erdem Hokenek, Peruvemba Balasubramanian, William Bogholtz, Christian Mathieu, Christos Zoulas
Pixel processing is the most fundamental performance bottleneck in high-end three-dimensional graphics systems. This paper presents the design of a specialized custom VLSI graphics chip that was implemented with one million transistors and is capable of processing pixels at extremely rapid rates close to one nanosecond. This was made possible by utilizing a large number of identical pipelined pixe...... hiện toàn bộ
Simple, Robust, and Memory-Efficient FastICA Algorithms Using the Huber M-Estimator Cost FunctionJournal of VLSI signal processing systems for signal, image and video technology - Tập 48 - Trang 143-159 - 2007
Scott C. Douglas, Jih-Cheng Chao
The goal of blind source separation is to separate multiple signals from linear mixtures without extensive knowledge about the statistical properties of the unknown signals. The design of separation criteria that achieve accurate and robust source estimates within a simple adaptive algorithm is an important part of this task. The purpose of this paper is threefold: (1) We introduce the Huber M-est...... hiện toàn bộ
Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia SystemsJournal of VLSI signal processing systems for signal, image and video technology - Tập 41 - Trang 35-47 - 2005
Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen
In this paper, a novel reconfigurable discrete wavelet transform processor architecture is proposed to meet the diverse computing requirements of future generation multimedia SoC. The proposed architecture mainly consists of reconfigurable processing element array and reconfigurable address generator, featuring dynamically reconfigurable capability where the wavelet filters and wavelet decompositi...... hiện toàn bộ