Tunneling through multi-layer gate dielectrics - an analytical model
60th DRC. Conference Digest Device Research Conference - Trang 105-106
Tóm tắt
We propose an analytical direct-tunneling model for multilayer gate dielectrics. This model predicts the amount of gate leakage current as a function of equivalent oxide thickness of the gate dielectric stack and the composition of the stack. This simple model is a useful tool in the development of future CMOS gate dielectric stacks.
Từ khóa
#Tunneling #Dielectrics #Analytical models #Leakage current #Semiconductor device modeling #Electrons #Frequency #Voltage #Predictive models #CMOS integrated circuitsTài liệu tham khảo
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