The stabilized reference-line (SRL) technique for scaled DRAMs

Symposium 1989 on VLSI Circuits - 1989
Tsuchida1, Ogwaki, Ohta1, Takashima1, Watanabe1
1ULSI Research Center, Toshiba Corporation, Kawasaki, Japan

Tóm tắt

Recently it has been reported that bitline interference noise increases with DRAM integration and that reduction of this noise is the key issue to realizing 16Mb DRAMs and beyond.(l) In order to reduce this interference noise.

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#Interference #Random access memory #Generators #Noise measurement #Couplings #Clocks #Capacitance

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Symposium 1989 on VLSI Circuits

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