Separation of d.c. and a.c. competing effect of polysilicon-gate depletion in deep submicron CMOS circuit performance

Solid-State Electronics - Tập 39 - Trang 1391-1393 - 1996
Wallace W. Lin1, Chunlin Liang1
1Intel Corporation, Mail-stop RN3-21, 2200 Mission College Blvd, Santa Clara, CA 95052, U.S.A.

Tài liệu tham khảo

Wong, 1988, IEDM Tech. Dig., 238 Lu, 1989, IEEE Electron Device Lett., 10, 192, 10.1109/55.31717 Hillenius, 1986, IEDM Tech. Dig., 252 Lee, 1992, IEEE Electron Device Lett., 13, 2, 10.1109/55.144932 Lin, 1992, A circuit simulation model for polysilicon gate depletion effect in MOSFET, Part I—theory and implementation, Intel Internal Memo Jeng, 1988, IEDM Dig., 114 Lin, 1993, IEEE Trans. Electron Device, ED-40, 1024, 10.1109/16.210216 IEEE Trans. Electron Device (submitted). Sheu, 1987, IEEE J. Solid-St. Circuits, SC-22, 558, 10.1109/JSSC.1987.1052773