Scenario Selection and Prediction for DVS-Aware Scheduling of Multimedia Applications

Journal of Signal Processing Systems - Tập 50 - Trang 137-161 - 2007
S. V. Gheorghita1, T. Basten1, H. Corporaal1
1EE Department, Electronic Systems Group, Eindhoven University of Technology, Eindhoven, The Netherlands

Tóm tắt

Modern multimedia applications usually have real-time constraints and they are implemented using application-domain specific embedded processors. Dimensioning a system requires accurate estimations of resources needed by the applications. Overestimation leads to over-dimensioning. For a good resource estimation, all the cases in which an application can run must be considered. To avoid an explosion in the number of different cases, those that are similar with respect to required resources are combined into, so called application scenarios. This paper presents a methodology and a tool that can automatically detect the most important variables from an application and use them to select and dynamically predict scenarios, with respect to the necessary time budget, for soft real-time multimedia applications. The tool was tested for three multimedia applications. Using a proactive scenario-based dynamic voltage scheduler based on the scenarios and the runtime predictor generated by our tool, the energy consumption decreases with up to 19%, while guaranteeing a frame deadline miss ratio close to zero.

Tài liệu tham khảo

S.P. Amarasinghe, J.M. Anderson, M.S. Lam, and A.W. Lim, “An Overview of a Compiler for Scalable Parallel Machines,” in Proc. of the 6th International Workshop on Languages and Compilers for Parallel Computing, Springer-Verlag, Germany, 1993, pp. 253–272.

A.C. Bavier, A.B. Montz and L.L. Peterson, “Predicting MPEG Execution Times,” ACM SIGMETRICS Perform. Eval. Rev., vol. 26, no. 1, 1998, pp. 131–140.

T.D. Burd, T.A. Pering, A.J. Stratakos and R.W. Brodersen, “A Dynamic Voltage Scaled Microprocessor System. IEEE J Solid-State Circuits, vol. 35, no. 11, 2000, pp. 1571–1580.

J.M. Carroll (Ed.) “Scenario-based Design: Envisioning Work and Technology in System Development”. Wiley, New York, NY, 1995.

S.S. Chawathe, A. Rajaraman, H. Garcia-Molina and J. Widom “Change Detection in Hierarchically Structured Information,” ACM SIGMOD Record, vol. 25, no. 2, 1996, pp. 493–504.

S.M. Clamen “8bit ULAW files collection,” 2006. http://www.cs.cmu.edu/People/clamen/misc/tv/Animaniacs/sounds/

G. Contreras, M. Martonosi, J. Peng, R. Ju and G.Y. Lueh, “XTREM: A Power Simulator for the Intel XScale core. ACM SIGPLAN Not., vol. 39, no. 7, 2004, pp. 115–125.

M. Dietz, et al., “MPEG-1 audio layer III test bitstream package,” 1994. http://www.iis.fhg.de.

B. Douglass, “Real Time UML: Advances in the UML for Real-Time Systems,” Addison Wesley, Reading, MA, 2004.

S.V. Gheorghita, T. Basten and H. Corporaal, “Intra-task Scenario-aware Voltage Scheduling,” in Proc. of the International Conference on Compilers, Architecture and Synthesis for Embedded Systesms (CASES), ACM Press, New York, NY, 2005, pp. 177–184.

S.V. Gheorghita, T. Basten and H. Corporaal, “Application Scenarios in Streaming-oriented Embedded System Design,” in Proc. of the International Symposium on System-on-Chip (SoC 2006). IEEE Computer Society Press, Los Alamitos, CA, 2006, pp. 175–178.

S.V. Gheorghita, T. Basten and H. Corporaal, “Profiling Driven Scenario Detection and Prediction for Multimedia Applications,” in Proc. of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS), IEEE Computer Society Press, Los Alamitos, CA, 2006, pp. 63–70.

S.V. Gheorghita, S. Stuijk, T. Basten and H. Corporaal, “Automatic Scenario detection for improved WCET estimation, in Proc. of the 42nd Design Automation Conference DAC, ACM Press, New York, NY, 2005, pp. 101–104.

M. Hind, M. Burke, P. Carini and J. Choi, “Interprocedural Pointer Alias Analysis,” ACM Trans. Program. Lang. Syst., vol. 21, no. 4, 1999, pp. 848–894.

Y. Huang, S. Chakraborty and Y. Wang, “Using Offline Bitstream Analysis for Power-aware Video Decoding in Portable Devices,” in Proc. of the 13th ACM International Conference on Multimedia, ACM Press, New York, NY, 2005, pp. 299–302.

Intel Corporation: Intel XScale microarchitecture for the PXA255 processor: User’s manual (2003). Order No. 278796.

N.K. Jha, “Low Power System Scheduling and Synthesis,” in Proc. of the IEEE/ACM International Conference on Computer Aided Design (ICCAD), IEEE Computer Society Press, Los Alamitos, CA, 2001, pp. 259–263.

K. Lagerström, “Design and Implementation of an MP3 decoder. http://www.kmlager.com/mp3/. M.Sc. thesis, Chalmers University of Technology, Sweden, 2001.

A. Maxiaguine, Y. Liu, S. Chakraborty and W.T. Ooi, “Identifying ‘representative’ Workloads in Designing MpSoC Platforms for Media Processing,” in Proc. of 2nd Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia), IEEE Computer Society Press, Los Alamitos, CA, 2004, pp. 41–46.

E.J. McCluskey, “Minimization of Boolean Functions,” Bell Syst. Tech. J., vol. 35, no. 5, 1956, pp. 1417–1444.

MPEG Software Simulation Group, “MPEG-2 video codec,” 2006. ftp://ftp.mpegtv.com/pub/mpeg/mssg/mpeg2vidcodec_v12.tar.gz.

S. Murali, M. Coenen, A. Radulescu, Goossens, K. and G. DeMicheli, “A Methodology for Mapping Multiple Use-cases Onto Networks on Chips,” in Proc. of Design, Automation, and Test in Europe (DATE), IEEE Computer Society Press, Los Alamitos, CA, 2006, pp. 118–123.

M. Palkovic, H. Corporaal and F. Catthoor, “Global Memory Optimisation for Embedded Systems Allowed by Code Duplication,” in Proc. of the 9th International Workshop on Software and Compilers for Embedded Systems (SCOPES), ACM Press, New York, NY, 2005, pp. 72–79.

J.M. Paul, D.E. Thomas, and A. Bobrek, “Scenario-oriented Design for Single-chip Heterogeneous Multiprocessors, ”IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 14, no. 8, 2006, pp. 868–880.

M. Pedram, W.C. Cheng, K. Dantu and K. Choi, “Frame-based Dynamic Voltage and Frequency Scaling for a MPEG decoder,” in Proc. of {IEEE/ACM} International Conference on Computer-Aided Design (ICCAD), ACM Press, New York, NY, 2002, pp. 732–737.

P. Poplavko, T. Basten, M. Pastrnak, J. van Meerbergen, M. Bekooij and P. de With, “Estimation of Execution Times of On-chip Multiprocessors Stream-oriented Applications,” in Proc. of the 3rd ACM/IEEE International Conference in Formal Methods and Models for Codesign (MEMOCODE), IEEE Computer Society Press, Los Alamitos, CA, 2005, pp. 251–252.

M.J. Rutten, J.T.J. van Eijndhoven, E.G.T. Jaspers, P. van der Wolf, E.D. Pol, O.P. Gangwal and A. Timmer, “A Heterogeneous Multiprocessor Architecture for Flexible Media Processing,” IEEE Des. Test Comput., vol. 19, no. 4, 2002, pp. 39–50.

R. Sasanka, C.J. Hughes and S.V. Adve, “Joint Local and Global Hardware Adaptations for Energy,” ACM SIGARCH Comput Archit News, vol. 30, no. 5, 2002, pp. 144–155.

D. Shin and J. Kim, “Optimizing Intra-task Voltage Scheduling Using Data Flow Analysis,” in Proc. of the 10th Asia and South Pacific Design Automation Conference (ASP-DAC), ACM Press, New York, NY, 2005, pp. 703–708.

Sun Microsystems, Inc., Free Implementation of CCITT compression types G.711, G.721 and G.723, 2006.

Tektronix, “MPEG-2 video test bitstreams,” 2006. ftp://ftp.tek.com/tv/test/streams/Element/MPEG-Video/525/.

I. Wegener, “Integer-Valued DDs,” in Branching Programs and Binary Decision Diagrams: Theory and Applications, SIAM Monographs on Discrete Mathematics and Applications, chap. 9. Society for Industrial and Applied Mathematics, Philadelphia, PA, 2000.

P. Yang, P. Marchal, C. Wong, S. Himpe, F. Catthoor, P. David, J. Vounckx, and R. Lauwereins, “Cost-efficient Mapping of Dynamic Concurrent Tasks in Embedded Real-time Multimedia Systems,” in Multi-Processor Systems on Chip, chap. 11, W. Wolf, A. Jerraya (Eds.), Morgan Kaufmann, San Francisco, CA, 2003.

Thông tin
Thông tin xuất bản

Journal of Signal Processing Systems

Tập 50

137-161

Thông tin tác giả