Multilevel Bipolar Memristor Model Considering Deviations of Switching Parameters in the Verilog-A Language

Krasnikov, G.Ya. and Orlov, O.M., Distinctive features and problems of CMOS technology for decrease in the node size to 0.18 μm or less, Nanotechnol. Russ., 2018, vol. 3, nos. 7–8, pp. 502–506.

Lukichev, V.F. and Shikolenko, Yu.L., Modern element base of the storage devices, Nano-Mikrosist. Tekh., 2015, no. 11 (184), pp. 40–53.

Alekseeva, L.G., Ivanov, A.S., and Luchinin, V.V., New electronic component base. Memristor, Nano- Mikrosist. Tekh., 2016, vol. 18, no. 5, pp. 297–308.

Chua, L., Memristor—the missing circuit element, IEEE Trans. Circuit Theory, 1971, vol. 18, no. 5, pp. 507–519.

Strukov, D.B. et al., The missing memristor found, Nature (London, U.K.), 2008, vol. 453, no. 7191, p. 80.

Maevskii, O.V., Pisarev, A.D., Busygin, A.N., et al., Logical commutator and a storage device based on memristor cells for electrical circuits of neuroprocessor, Vestn. Tyumen. Univ., Fiz.-Mat. Model., Neft’, Gaz, Energet., 2016, vol. 2, no. 4, pp. 100–111.

Lupo, N. et al., An approximated Verilog-A model for memristive devices, in Proceedings of the IEEE International Symposium on Circuits and Systems ISCAS, 2018, pp. 1–5.

Yang, Y. et al., Verilog-A based effective complementary resistive switch model for simulations and analysis, IEEE Embedded Syst. Lett., 2014, vol. 6, no. 1, pp. 12–15.

Wang, X., Xu, B., and Chen, L., Efficient memristor model implementation for simulation and application, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 2017, vol. 36, no. 7, pp. 1226–1230.

Gornev, E.S. and Teplov, G.S., Mathematical model of a finite automaton of an abstract neuron and the networks based on it, Nano-Mikrosist. Tekh., 2018, vol. 20, no. 7, pp. 434–442.

Baturin, A.S., Bulakh, K.V., Grigal, I.P., Gornev, E.S., et al., Resistive switching effect in graded HfxAl1–xOy films grown by atomic layer deposition, Nano-Mikrosist. Tekh., 2013, no. 6, pp. 13–18.

Chuprik, A.A., Baturin, A.S., Gornev, E.S., et al., Prototype of memristor cell based on MDM structures using a variable composition dielectric film HfxAl1–xOy, Zh. Radioelektron., 2013, no. 6, p. 10.

Orlov, O.M., Markeev, A.M., Zenkevich, A.V., et al., Research features of FRAM and ReRAM non-volatile memory devices based on ALD processes, Elektron. Tekh., Ser. 3: Mikroelektron., 2015, vol. 4, no. 1, pp. 62–68.

Benderli, S. and Wey, T.A., On SPICE macromodeling of TiO2 memristors, Electron. Lett., 2009, vol. 45, no. 7, pp. 377–379.

Emara, A.A., Aboudina, M.M., and Fahmy, H.A.H., Corrected and accurate Verilog-A for linear dopant drift model of memristors, in Proceedings of the 57th IEEE International Midwest Symposium on Circuits and Systems MWSCAS 2014, IEEE, 2014, pp. 499–502.

Biolek, Z., Biolek, D., and Biolkova, V., SPICE model of memristor with nonlinear dopant drift, Radioengineering, 2009, vol. 18, no. 2.

Joglekar, Y.N. and Wolf, S.J., The elusive memristor: properties of basic electrical circuits, Eur. J. Phys., 2009, vol. 30, no. 4, p. 661.

Prodromakis, T. et al., A versatile memristor model with nonlinear dopant kinetics, IEEE Trans. Electron. Dev., 2011, vol. 58, no. 9, pp. 3099–3105.

Kvatinsky, S. et al., Models of memristors for SPICE simulations, in Proceedings of the 27th IEEE Convention of Electrical and Electronics Engineers in Israel (IEEEI), 2012, pp. 1–5.

Pickett, M.D. et al., Switching dynamics in titanium dioxide memristive devices, J. Appl. Phys., 2009, vol. 106, no. 7, p. 074508.

Kvatinsky, S. et al., TEAM: threshold adaptive memristor model, IEEE Trans. Circuits Syst. I: Reg. Pap., 2013, vol. 60, no. 1, pp. 211–221.

Yakopcic, C. et al., A memristor device model, IEEE Electron Dev. Lett., 2011, vol. 32, no. 10, pp. 1436–1438.

Zeng, G. et al., Polynominal metamodel integrated Verilog-AMS for memristor-based mixed-signal system design, in Proceedings of the 56th IEEE International Midwest Symposium on Circuits and Systems MWSCAS, 2013, IEEE, 2013, ppp. 916–919.

Corinto, F. and Ascoli, A., A boundary condition-based approach to the modeling of memristor nanostructures, IEEE Trans. Circuits Syst. I: Reg. Pap., 2012, vol. 59, no. 11, pp. 2713–2726.

Kvatinsky, S. et al., VTEAM: a general model for voltage-controlled memristors, IEEE Trans. Circuits Syst. II: Express Briefs, 2015, vol. 62, no. 8, pp. 786–790.

Garcia-Redondo, F. et al., SPICE compact modeling of bipolar/unipolar memristor switching governed by electrical thresholds, IEEE Trans. Circuits Syst. I: Reg. Pap., 2016, vol. 63, no. 8, pp. 1255–1264.

Garcia-Redondo, F., Lôpez-Vallejo, M., and Barrio, C.L., Advanced integration of variability and degradation in RRAM SPICE compact models, in Proceedings of the 14th IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design SMACD, 2017, pp. 1–4.

Hajri, B. et al., Oxide-based RRAM models for circuit designers: a comparative analysis, in Proceedings of the 12th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era DTIS, 2017, pp. 1–6.

Panda, D., Sahu, P.P., and Tseng, T.Y., A collective study on modeling and simulation of resistive random access memory, Nanoscale Res. Lett., 2018, vol. 13, no. 1, p. 8.

Fetisova, A.I., Kirtaev, R.V., Matveev, Yu.A., et al., HFO2-based nanoscale electronic synapses in cross-bar geometry, in Proceedings of the 58th Scientific Conference of Mosc. Phys. Tech. Inst., Dolgoprudnyi, Moscow Reg., Russia, Nov. 23–28, 2015.

Bai, Y. et al., Study of multi-level characteristics for 3D vertical resistive switching memory, Sci. Rep., 2014, vol. 4, p. 5780.