Innovations in defluxing engineered chemistries for removing flux residue on back end solder reflowed bumped wafers

The semiconductor industry is in the early stages of a once-in-a-generation packaging substitution. The primary substitution is surface mount packages to area array packages. Within area array packages, a secondary substitution is taking place which is the replacement of wire bonding with flip chip as the die level interface. Flip chip encompasses all bumping technologies that interface a semiconductor die to its next level of interconnect: for example, a BGA substrate, FCIP, DCA and wafer level CSP. Process optimization of the soldering process requires selection of a flux technology, optimized reflow conditions and consideration of the cleaning requirement. Cleaning chemistry selection is driven by the nature of the bumping process used, flux chemistry, reflow condition, number of wafers cleaned per day, and of course environmental, health and safety concerns. Defluxing, which has long been a common practice in the electronic assembly environment, is now more than ever an issue in this emerging technology. This paper presents data on newly developed cleaning chemistries to meet the demanding requirements of wafer level back in processing.