High-temperature quasi-saturation model of high-voltage DMOS power devices

C.L. Yang1, J.B. Kuo1
1Dept. of Electrical & Computer Eng., University of Waterloo, Waterloo, Ontario, Canada

Tóm tắt

This paper reports the analysis of the high-temperature (300 K-400 K) quasi-saturation behavior of high-voltage DMOS devices using a closed-form quasi-saturation model. Based on the analytical model, at the higher temperature, the quasi-saturation behavior occurs at a smaller gate voltage due to the smaller saturated velocity as verified by the MEDICI results.

Từ khóa

#Electrons #Temperature dependence #Threshold voltage #Region 2 #Telephony #Analytical models #Medical simulation #Temperature distribution #Region 3

Tài liệu tham khảo

10.1109/16.127492 10.1109/16.231569 sancez, 1985, Quasi-saturation effect in highvoltage VDMOS transistors, IEEE Proceedings, 132