Electrical modeling and analysis of lead-bonded and wire-bonded /spl mu/BGA/sup /spl reg// packages for high-speed memory applications
Tóm tắt
Lead-bonded /spl mu/BGA (/spl mu/BGA/sup /spl reg//) and wire-bonded /spl mu/BGA (/spl mu/BGA/sup /spl reg//-W) packages with flex- and laminate-based substrates have been developed for high-speed memory devices. This work presents the inductance, capacitance, and resistance values for lead-bonded and wire-bonded /spl mu/BGA packages obtained from simulation study to demonstrate and compare their electrical performance. The effect of the bonding technology (lead or wire bond), die-shrink and the type of substrate material on the electrical performance for the /spl mu/BGA package was analyzed by simulation. To verify these results, they were compared to the experimentally measured values. In addition, the electrical performance limitation of the /spl mu/BGA packages was determined by conducting simulation analysis to obtain S-parameters. The bandwidth of the /spl mu/BGA packages was predicted based on the return loss and insertion loss calculated from the S-parameters.
Từ khóa
#Packaging #Bonding #Performance analysis #Analytical models #Scattering parameters #Insertion loss #Inductance #Capacitance #Electric resistance #WireTài liệu tham khảo
0, Ansoft Ansoft HFSS Version 8
shin, 2001, Electrical Measurement, Modeling and Analysis for High-Speed and High-Density IC Package Design, Proceedings HDI 2001, 47
pozar, 1998, Microwave Engineering, 300
bakoglu, 1990, Circuits Interconnections and Packaging for VLSI, 309
0, Ansoft Maxwell Spicelink Version 4 5
fjelstad, 2000, Chip Scale Packaging and Direct Chip Attach Technologies, Electronic Packaging and Interconnection Handbook
johnson, 1993, High-Speed Digital Design, 319
1996, Guideline for Developing and Documenting Package Electrical Models Derived from Computational Analysis, EIA/JEP126
1995, Guidelines for Measurement of Electronic Package Inductance and Capacitance Model Parameters, EIA/JEP123
rambus, 1999, Direct RDRAM®Validation Specification Version 1 0
solberg, 2001, Chip-Scale Packaging for Memory Applications, Proc SEMICON Singapore 2001, 117
young, 2001, Digital Signal Integrity
bogatin, 2001, Fundamental Principles of Signal Integrity, GigaTest Labs Signal Integrity Course Note