Characterization and optimization of the SiO2/SiC metal-oxide semiconductor interface

Journal of Electronic Materials - Tập 24 - Trang 303-309 - 1995
J. N. Shenoy1, G. L. Chindalore1, M. R. Melloch1, J. A. Cooper1, J. W. Palmour2, K. G. Irvine2
1School of Electrical Engineering, Purdue University, West Lafayette
2Cree Research, Inc., Durham

Tóm tắt

The response time of deep-lying interface states in silicon carbide metal-oxide semiconductor (MOS) capacitors may be thousands of years at room temperature. To accurately measure interface state density beyond about 0.6 eV from the band edge, it is necessary either to raise the temperature well above 300K so that all states can follow changes in DC bias, or to utilize photoexcitation to modulate the interface state population at room temperature. In this paper, we use the hilo capacitance-voltage technique and the ac conductance technique at elevated temperatures to characterize the MOS interface of p-type 6H-SiC. We report on the effect of surface cleaning and push/pull rates, and give the first detailed comparison of the effect of aluminum vs boron as the p-type dopant on the MOS interface. Oxides grown on 6H-SiC at 1150°C in wet O2 followed by a 30 min insitu argon anneal have fixed charge densities as low as 9 x 1011 cm-2 and interface state densities as low as 1.5 x 1011 cm-2 eV-1.

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Thông tin xuất bản

Journal of Electronic Materials

Tập 24

303-309

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