A low-power Reed-Solomon decoder for STM-16 optical communications
Proceedings. IEEE Asia-Pacific Conference on ASIC, - Trang 351-354
Tóm tắt
In this paper, a low-power Reed-Solomon (RS) decoder for STM-16 optical communications is presented. It mainly contains one (255,239) RS decoder and four 2 K-bit embedded memory for correcting the received codewords. Except the novel syndrome calculator reducing half the syndrome computations, our proposal also features a modified Berlekamp-Massey algorithm in the key equation solver and a terminated mechanism in the Chien search circuit. The (255,239) RS decoder is implemented by 0.25 /spl mu/m CMOS 1P5M standard cells with gate counts of 32.9 K and area of 2.03 mm/sup 2/. Simulation results show our approach can work successfully at the data rate of 2.5-Gbps and achieve 80% reduction of power dissipation on the average.
Từ khóa
#Reed-Solomon codes #Decoding #Polynomials #Optical fiber communication #Equations #Energy consumption #Proposals #Computational modeling #Circuit simulation #Power dissipationTài liệu tham khảo
seki, 2001, Single-chip 10.7 Gb/s FEC CODEC LSI using time-multiplexed RS de-coder, IEEE Custom Integrated Circuits Conference, 289
mceliece, 1988, The Decoding of Reed-Solomon Codes, The Telecommunications and Data Acquisition Progress Report 42–95, 153
chang, 1994, A high speed Reed-Solomon CODEC chip using look-forward architecture, IEEE Asia-Pacific Conference on Circuits and Systems, 212
10.1137/0109020