A high-throughput low-cost AES cipher chip

Tsung-Fu Lin1, Chih-Pin Su1, Chih-Tsun Huang1, Cheng-Wen Wu1
1Laboratory for Reliable Computing, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan

Tóm tắt

We propose an efficient hardware implementation of the AES (Advanced Encryption Standard) algorithm, with key expansion capability. Compared with the widely used table-lookup technique, the proposed basis transformation technique reduces the hardware overhead of the S-box by 64%. Our pipelined design has a very high throughput rate. Using a typical 0.35 /spl mu/m CMOS technology, a 200 MHz clock is easily achieved, and the throughput rate is 2.381 Gbps for 128-bit keys, 2.008 Gbps for 192-bit keys, and 1.736 Gbps for 256-bit keys. Testability of the design also is considered. The hardware cost of the AES design is about 58.5 K gates.

Từ khóa

#Elliptic curve cryptography #Hardware #CMOS technology #Clocks #Application specific integrated circuits #Table lookup #Laboratories #Costs #Internet #Communication system security

Tài liệu tham khảo

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