A 0.18-/spl mu/m CMOS offset-PLL upconversion modulation loop IC for DCS-1800 transmitter

J.-M. Hsu1
1SoC Technology Center, Industrial Technology Research Institute, Hsinchu, Taiwan

Tóm tắt

A DCS-1800 offset-PLL upconversion modulation loop IC, which is fabricated in a 0.18-/spl mu/m CMOS technology, is presented in this paper. This IC operates at 2.8 V supply voltage with a current consumption of 36 mA. The measured r.m.s. and peak phase errors of the GMSK transmission signal are 1.6 and 4 degree, respectively. It is shown that such circuit can be implemented in a CMOS process with current dissipation and performance comparable to BiCMOS commercial products. The advantages of an upconversion modulation loop and the design issues of IQ modulators are also described in this paper.

Từ khóa

#CMOS integrated circuits #Transmitters #Voltage-controlled oscillators #Phase frequency detector #CMOS technology #CMOS process #Transceivers #BiCMOS integrated circuits #Radio frequency #Phase modulation

Tài liệu tham khảo

10.1109/4.748179 10.1109/CICC.2000.852738 1997, Digital cellular telecommunications system (Phase 2+); Mobile Station (MS) conformance specification; Part 1: Conformance specification (GSM 11.10-1 version 6.0.0 Release 1997), European Telecommunications Standards Institute Copyright razavi, 1999, RF transmitter architectures circuits, CICC Dig Tech Papers, 197 wu, 1997, A 2V 100MHz CMOS vector modulator, ISSCC Digest of Technical Papers, 80 10.1109/4.643666 0, HD155121F, Hitachi Semiconductor datasheet