Solder bumping via paste reflow for area array packages

Benlib Huang1, Ning-Cheng Lee1
1Indium Corporation of America, Utica, NY, USA

Tóm tắt

With the electronic industry advancing rapidly toward smaller, lighter, faster, and cheaper products, area array packages including BGAs, CSPs, and flip chips quickly becomes the focus of IC packaging technology, mainly due to the robustness in handling and considerable reduction in size. The solder paste printing and reflow process is a well established robust and cheap process. Obviously, the throughput and the cost of solder bumping could be at least order of magnitude more favorable if a conventional surface mount solder paste printing and reflow process can be employed. Works in this paste bumping process has been rare, and the focus has been on wafer bumping only. In this study, the cost of the paste bumping process is compared with other processes. In addition, solder bumping for BGA, CSP, and wafer via a solder paste print/reflow process with high quality and high yield is demonstrated, and the requirements on solder paste materials and printing parameters are discussed.

Từ khóa

#Costs #Throughput #Electronics packaging #Printing #Integrated circuit packaging #Optical arrays #Robustness #Indium #Flip chip #Manufacturing processes

Tài liệu tham khảo

kloeser, 1999, A low cost bumping process for flip chip and CSP applications, Proceedings of IMAPS, 1 strandjord, 1999, Low cost wafer bumping processes for flip chip applications (Electroless Nickel-Gold/Stencil printing), Proceedings of IMAPS, 18 10.1108/eb044044 kloeser, 1998, EXPERIENCE WITH A FULLY AUTOMATIC FLIP-CHIP ASSEMBLY LINE INTEGRATING SMT, Proceedings - NEPCON West 1998 xiao, 1993, Prospects of solder paste applications in ultra-fine pitch era, Surface Mount International San Jose CA schake, 2000, Stencil printing for wafer bumping, Semiconductor International, 133 lee, 1998, Troubleshooting BGA assembly, Symposium of BGA kloeser, 1998, Low cost flip-chip assembly: a challenge for future market, Proc Of The Third International Symposium of Electronic Packaging Technology, 487 oppert, 1999, A low cost bumping process for 300 mm wafers, Proceedings of IMAPS, 34 bogdanski, 1998, The Economies of Flip Chip Wafer Bumping and Assembly, Proceedings - NEPCON West 1998 kloeser, 1998, Low cost flip-chip assembly: a challenge for future market, Proc Of The Third International Symposium of Electronic Packaging Technology, 487