A data flow image compression processor
Symposium 1989 on VLSI Circuits - Trang 119-120 - 1989
Tóm tắt
This paper presents a binary image data compression and expansion processor that can compress 500 kbytes of image data into 35 kbyles of code data in 0.41 seconds. The processor equips with data flow hardware and CPU on the one chip. Topics described include the algorithms, architecture, and performance.
