27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium

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Bringing test to design: testing in the designer's event based environment
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 372-375
R. Rajsuman
In this paper, we present a new tester that works in the IC designer's simulation environment instead of traditional ATE test environment. The tester uses IC simulation data from a Verilog or VHDL simulator in the vcd format. The basic tester architecture and its operation are described.
#Circuit testing #Integrated circuit testing #Design engineering #Costs #Circuit simulation #Hardware design languages #Timing #Signal design #Integrated circuit modeling #Computer architecture
Optimizing test strategies during PCB design for boards with limited ICT access
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 364-371
A. Verma
Engineers have used past experience or subjective preference as a means for assigning test strategies to new products without analyzing the benefits and weaknesses of various different test approaches in a quantitative manner. DFT (design for test) software tools that enable testability analysis during board design allow test engineers to work concurrently with designers. Case study results demons...... hiện toàn bộ
#Design optimization #Software testing #Design for testability #Software design #Production #Costs #Software tools #Design engineering #Software quality #Medical services
Pressfit technology for 3-D molded interconnect devices (MID) - A lead-free alternative to solder joints - challenges and solutions concepts
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 238-244
M. Eisenbarth, K. Feldmann
The continuous trend in electronics production towards new substrate materials, the development of the third dimension by molded interconnect devices (3-D MID) and the constantly rising integration of functions and miniaturization of electronic products leads to new challenges for interconnection technology. Compared to interconnections established by solder materials the pressfit technology offer...... hiện toàn bộ
#Environmentally friendly manufacturing techniques #Lead #Soldering #Connectors #Crystalline materials #Temperature #Continuous production #Thermal stresses #Gases #Cleaning
Innovations in defluxing engineered chemistries for removing flux residue on back end solder reflowed bumped wafers
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 67-72
M. Bixenman
The semiconductor industry is in the early stages of a once-in-a-generation packaging substitution. The primary substitution is surface mount packages to area array packages. Within area array packages, a secondary substitution is taking place which is the replacement of wire bonding with flip chip as the die level interface. Flip chip encompasses all bumping technologies that interface a semicond...... hiện toàn bộ
#Technological innovation #Chemistry #Semiconductor device packaging #Chemical technology #Cleaning #Flip chip #Electronics industry #Wafer scale integration #Wire #Wafer bonding
Environmentally friendly, high thermal resistant, low CTE substrate material for semiconductor packaging
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 389-390
T. Baba
Semiconductor packaging technology has been moving towards increased miniaturization, lighter weight and higher density. Flip Chip packaging is therefore becoming the mainstream packaging technology for next generation devices. The technology trend has been moving towards much finer pitch interconnections between the semiconductor chip and the package substrate, much narrower circuit width on the ...... hiện toàn bộ
#Thermal resistance #Substrates #Semiconductor materials #Semiconductor device packaging #Resins #Integrated circuit interconnections #Temperature #Gold #Materials reliability #Semiconductor device reliability
Flux technology for lead-free alloys and its impact on cleaning
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 316-322
Ning-Cheng Lee, M. Bixenman
Flux technology for lead-free alloys differs considerably from that for eutectic Sn/Pb solder systems, mainly for soldering and cleaning purpose. For most of the lead-free solders, paste handling is not an issue. Although dust has not settled yet, it becomes clear that the flux needed should have higher flux capacity, higher oxygen barrier capability, and higher thermal stability. Halide-containin...... hiện toàn bộ
#Environmentally friendly manufacturing techniques #Lead #Cleaning #Tin #Thermal stability #Zinc #Soldering #Atmosphere #Solids #Temperature
Twenty Seventh Annual IEEE/CPMT/SEMI International Electronics Manufacturing Technology Symposium (Cat. No.02CH37299)
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - 2002
Presents the front cover of the proceedings record.
Characteristics of silver-plated film on the second wire bondability
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 382-388
T.Y. Lin, K.L. Davison, W.S. Leong, S. Chua, O. Robin, Y.F. Yao, J.S. Pan, J.W. Chai, K.C. Toh, W.C. Tjiu
Strong bond between the gold wire and the silver-plated leadframe is significantly crucial for maintaining either bondability or reliability during IC (integrated circuit) manufacturing process and IC application in the fields. This study investigated the surface and grain structure of the silver-plated film on the copper leadframe in terms of surface roughness test by atomic force microscopy (AFM...... hiện toàn bộ
#Wire #Bonding #Rough surfaces #Surface roughness #Application specific integrated circuits #Atomic force microscopy #Atomic measurements #Force measurement #Transmission electron microscopy #US Department of Energy
Gold stud bump in flip-chip applications
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 110-114
J. Jordan
As power requirements and operating frequencies increase, more and more designs will look toward ball bumps as an interconnect solution. While solder has traditionally been the incumbent material for these bumps, solder's limitations have become manufacturing and performance limitations. As a result, packaging designers are looking toward gold bumps as a strong contender in the first-level interco...... hiện toàn bộ
#Gold #Wire #Packaging #Bonding #Frequency #Integrated circuit interconnections #Lead #Inductance #Switches #Manufacturing
PATCHWORK smart power thick-film hybrids for automotive under hood applications
27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - - Trang 35-40
P.K. Wilczek
PATCHWORK provides a high degree of integration combining logic and power on one ceramic substrate to respond to customer-specific circuits with acceptable engineering costs and short periods of development. The hybrids are reliable and high-temperature resistant and can be manufactured at a fair market price. The introduction of PATCHWORK combines Ag/Pd/Pt, copper and gold conductors, high temper...... hiện toàn bộ
#Automotive engineering #Logic circuits #Ceramics #Substrates #Reliability engineering #Power engineering and energy #Costs #Integrated circuit reliability #Manufacturing #Copper
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