dv/dt Noise canceling circuit in ultra-high-voltage MOS gate drivers

Analog Integrated Circuits and Signal Processing - Tập 77 - Trang 271-276 - 2013
Yong-Rui Zhao1,2, Xin-Quan Lai1,2, Han-Xiao Du1,2, Cong Liu1,2
1Institute of Electronic CAD, Xidian University, Xi’an, People’s Republic of China
2Key Lab of High-Speed Circuit Design and EMC, Ministry of Education, Xidian University, Xi’an, People’s Republic of China

Tóm tắt

A novel small-sized voltage mode noise canceling circuit is introduced in order to remove the dv/dt noise in the ultra-high-voltage MOS gate drive IC more efficiently, accurately and steadily. The dv/dt noise is removed completely by the mutual controlling of the high-side voltage signal, which improves the incapability of the full removal of dv/dt noise by conventional noise remove circuit due to the mismatch in the high-side circuit. In addition, no additional circuit is introduced to the noise canceling circuit. Fabricated in 700 V 0.5 μm BCD with simulation tool HspiceD, the circuit shows good performances of a quiescent current less than 50 μA, and a full removal of 70 V/ns dv/dt noise by the noise elimination function block. Moreover, a mismatch rate ranging within ±100 % can also be fully eliminated, thus ensuring the stability and reliability of the ultra-high-voltage gate driver’s performance.

Tài liệu tham khảo

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