The iSLIP scheduling algorithm for input-queued switches
Tóm tắt
Từ khóa
Tài liệu tham khảo
gupta, 0, analysis of a packet switch with input and output buffers and speed constraints, Proc INFOCOM `91, 694
parulkar, 0, aitpm: a strategy for integrating ip with atm, Proc ACM SIGCOMM `95, 287
partridge, 0, a fifty gigabit per second ip router, IEEE/ACM Transactions on Networking
oie, 1989, <formula><tex>$\backslash$</tex></formula>e ect of speedup in nonblocking packet switch, Proc ICC `89, 410
huang, 0, starlite: a wideband digital switch, Proc GLOBECOM `84, 121
0, GRF Multigigabit Router GRF IP Switch Tech Product Description
chuang, 0, matching output queueing with a combined input output queued switch, IEEE J Selected Areas in Communication
0, Performing Internet Routing and Switching at Gigabit Speeds GSR 12000 Tech Product Description
chen, 0, a fast algorithm for multi-channel/port traffic scheduling, Proc IEEE Supercom/ICC `94, 96
rekhter, 0, Cisco systems tag switching architecture overview Internet RFC 2105
chiussi, 1993, Implementation of a three-stage Banyan-based architecture with input and output buffers for large fast packet switches
mckeown, 1995, Scheduling algorithms for input-queued cell switches
mckeown, 0, achieving 100% throughput in an input-queued switch, Proc IEEE Infocom `96, 296