System-on-a-chip test-data compression and decompression architectures based on Golomb codes

10.1109/TEST.1998.743186

10.1109/ICCAD.1998.144279

10.1109/VTEST.1994.292312

10.1109/TEST.1997.639597

10.1109/VTEST.1998.670850

10.1109/TIT.1966.1053907

10.1147/rd.182.0164

10.1109/DCC.1997.581993

10.1109/ISIT.1997.612986

10.1109/TEST.1997.639613

10.1109/43.712101

10.1109/2.544235

10.1109/VTEST.1999.766642

10.1109/43.728923

10.1023/A:1008384201996

10.1109/VTEST.1998.670900

hetheringten, 1999, logic bist for large industrial designs, Proc Int Test Conf, 358

10.1109/VTEST.1999.766654

10.1109/TEST.1998.743146

1992, Design compiler reference manual

sentovich, 1992, SIS A system for sequential circuit synthesis

univ illinois, 0, Research in VLSI Circuit Testing Verification and Diagnosis

10.1109/TEST.1995.529854

lee, 0, On the generation of test patterns for combinational circuits

10.1109/VTEST.1998.670873