Simulating Turing machines on Maurer machines
Tài liệu tham khảo
Baeten, 1990, Process Algebra, vol. 18
Bergstra, 2003, Polarized process algebra and program equivalence, vol. 2719, 1
Bergstra, 2002, Program algebra for sequential code, Journal of Logic and Algebraic Programming, 51, 125, 10.1016/S1567-8326(02)00018-8
J.A. Bergstra, C.A. Middelburg, Maurer computers for pipelined instruction processing, Computer Science Report 06-12, Department of Mathematics and Computer Science, Eindhoven University of Technology, March 2006
Bergstra, 2006, Splitting bisimulations and retrospective conditions, Information and Computation, 204, 1083, 10.1016/j.ic.2006.03.003
J.A. Bergstra, C.A. Middelburg, Synchronous cooperation for explicit multi-threading, Computer Science Report 06-29, Department of Mathematics and Computer Science, Eindhoven University of Technology, September 2006
Bergstra, 2006, Thread algebra with multi-level strategies, Fundamenta Informaticae, 71, 153
J.A. Bergstra, C.A. Middelburg, A thread calculus with molecular dynamics, Computer Science Report 06-24, Department of Mathematics and Computer Science, Eindhoven University of Technology, August 2006
J.A. Bergstra, C.A. Middelburg, Distributed strategic interleaving with load balancing, Computer Science Report 07-03, Department of Mathematics and Computer Science, Eindhoven University of Technology, January 2007
J.A. Bergstra, C.A. Middelburg, Maurer computers with single-thread control, in: Fundamenta Informaticae, 2007, submitted for publication. Preliminary version: Computer Science Report 05-17, Department of Mathematics and Computer Science, Eindhoven University of Technology
J.A. Bergstra, C.A. Middelburg, Thread algebra for strategic interleaving, in: Formal Aspects of Computing, 2007, submitted for publication. Preliminary version: Computer Science Report 04-35, Department of Mathematics and Computer Science, Eindhoven University of Technology
Bergstra, 2002, Combining programs and state machines, Journal of Logic and Algebraic Programming, 51, 175, 10.1016/S1567-8326(02)00020-6
Bolychevsky, 1996, Dynamic scheduling in RISC architectures, IEE Proceedings Computers and Digital Techniques, 143, 309, 10.1049/ip-cdt:19960788
Davis, 1983
Hehner, 1986, Predicative methodology, Acta Informatica, 23, 487, 10.1007/BF00288466
Hermes, 1965
Hoare, 1985
Hopcroft, 2001
Jesshope, 2000, Micro-threading: A new approach to future RISC, 34
Linz, 1997
Maurer, 1966, A theory of computer instructions, Journal of the ACM, 13, 226, 10.1145/321328.321334
Maurer, 2006, A theory of computer instructions, Science of Computer Programming, 60, 244, 10.1016/j.scico.2005.09.001
Milner, 1989
Turing, 1937, On computable numbers, with an application to the Entscheidungs problem, Proceedings of the London Mathematical Society, Series 2, 42, 230, 10.1112/plms/s2-42.1.230