Reconfigurable silicon nanotube using numerical simulations

A. Nisha Justeena1, R. Ambika2, P. S. S. K. P. Sadagopan3, R. Srinivasan1
1Department of IT, SSN College of Engineering, Chennai, India
2Tech Mahindra, Bangalore, India
3Department of ECE, SSN College of Engineering, Chennai, India

Tóm tắt

Device reconfigurability refers to the ability to choose N or P type for the same structure. Such reconfigurable operation is demonstrated herein for a silicon nanotube (SiNT) structure using three-dimensional (3D) technology computer-aided design (TCAD) numerical simulations. The reconfigurable field-effect transistor (RFET) can exhibit N- or P-type operation via the application of an appropriate bias to a program gate. The regular (i.e., control) gate is also present in the RFET. In the planar nanowire structure, the program gate is placed beside the regular/control gate. Since the SiNT structure has both inner and outer gates, we propose to use the inner gate as the control gate and the outer gate as the program gate, to achieve device reconfigurability in the SiNT structure. Two approaches are presented to achieve such reconfigurability, based on a (1) single or (2) double program gate. The metrics considered in this work are the ON current (ION), OFF current (IOFF), $$\frac{{I_{\text{ON}} }}{{I_{\text{OFF}} }}$$ ratio, and unity-gain cutoff frequency (fT). The effects of the outer diameter, inner diameter, and tube wall thickness of the tube are also discussed. The outer and inner diameters of the tube are found to determine the above-mentioned performance parameters. While a smaller inner diameter is preferred from the point of view of the $$\frac{{I_{\text{ON}} }}{{I_{\text{OFF}} }}$$ ratio, a larger inner diameter is desired from the radio frequency (RF) perspective.

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Tài liệu tham khảo

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