Numerische Untersuchung des Sperrverhaltens von planarenpn-Übergängen mit Feldplatten

K.-P. Brieger1, W. Gerlach1, N. A. Liontas1
1Institut für Werkstoffe und Bauelemente der Elektrotechnik, Berlin 12,

Tóm tắt

Từ khóa


Tài liệu tham khảo

Grove, A. S.; Leistiko, O.; Hooper, W. W.: Effect of surface fields on the breakdown voltage of planar siliconp-n junctions. IEEE Trans. Electron Devices ED- 14, 3 (1967) 157–162

Conti, F.; Conti, M.: Surface breakdown in silicon planar diodes equipped with field plate; Solid-State Electron. 15 (1972) 93–105

Clark, L. E.; Zoroglu, D. S.: Enhancement of Breakdown properties of overlay annular diodes by field shaping resistive films; Solid-State Electron. 15 (1972) 653–657

Rusu, A.; Bulucea, C.: Deep-depletion breakdown voltage of silicon-dioxide/silicon MOS capacitors; IEEE Trans. Electron Dev., ED- 26 (1979) 201–205

Rusu, A.; Pietrareanu, O.; Bulucea, C.: Reversible breakdown voltage collapse in silicon gate-controlled diodes; Solid-State Electron. 23 (1979) 473–480

Hwang, K.; Navon, D. H.: Breakdown voltage optimization of siliconp-π-ν planar junction diodes; IEEE Trans. Electron Dev., ED- 31, 9, (1984) 1126–1134

Lee, C. A.; Logan, R. A.; Batdorf, R. L.; Kleimack, J. J.; Wiegmann, W.: Ionisation rates of holes and electrons in silicon; Phys. Rev. 134 (1964) 761–773

Pelka, J.: Untersuchung spezieller Randkonturen hochsperrenderp + n-Übergänge zur Vermeidung von Oberflächendurchbrüchen; Diss. TU-Berlin (1983)

Bulucea, C. D.; Prisecaru, D. C.: The calculation of the avalanche multiplication factor in siliconp-n junctions taking into account the carrier generation (thermal or optical) in the space-charge region; IEEE Trans. Electron Dev., ED- 20, 8, (1973) 692–701

Chynoweth, A. G.: Ionisation rates for electrons and holes in silicon; Phys. Rev. 109 (1958) 1537–1540

Van Overstraeten, R.; De Man, H.: Measurement of the ionisation rates in diffused siliconp-n junctions; Solid-State Electron. 13 (1970) 583–608

Temple, V. A. K.; Adler, M. S.: Calculation of the diffusion curvature related avalanche breakdown in high voltage planarp-n junctions; IEEE Trans. Electron Dev., ED- 22, 10, (1975) 910–915

Liontas, N. A.: Numerische Untersuchungen an einer Feldplattenstruktur zur Optimierung des Sperrverhaltens von Si-Halbleiterdioden; Diplomarbeit, TU Berlin (1984)