Modeling of program/erase transient in heterogeneous SiNx charge trap flash memories

Superlattices and Microstructures - Tập 144 - Trang 106577 - 2020
Ravi Solanki1, Ajay Manwani2, Ashutosh Mahajan3, Rajendra M. Patrikar1
1Centre for VLSI and Nanotechnology, Visvesvaraya National Institute of Technology, Nagpur, 440010, India
2Western Digital, Bangalore, India
3Centre for Nanotechnology Research, Vellore Institute of Technology, Vellore, 632014, India

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