Methodological and theoretical issues of throughput evaluation in complex architecture systems
Tài liệu tham khảo
G. A. Egorov, K. V. Peselev, V. V. Rodionov, et al., The SM Computer: Configuration and Application [in Russian], Finan. Stat., Moscow (1986).
T. N. Mudge and Al-Sadoun, “Memory interference models with variable connection time,” IEEE Trans., Comput.,C-33, No. 11, 1033–1038 (1984).
L. Bhuyan and C. Das, “Bandwidth availability of multiple-bus multiprocessors,” IEEE Trans., Comput.,C-34, No. 10, 918–927 (1985).
Yu. M. Sokol, “An iterative algorithm for estimating the efficiency of multibus computing systems with time-sharing processor and memory,” Upr. Sist. Mashin., No. 2, 57–64 (1986).
L. B. Boguslavskii and A. Ya. Kreinin, “Analysis of the effect of hardware conflicts on multiprocessor system throughput,” Upr. Sist. Mashin., No. 2, 32–37 (1981).
B. V. Gnedenko, Yu. K. Velyaev, and A. D. Solov'ev, Mathematical Methods in Reliability Theory [in Russian], Nauka, Moscow (1965).
K. V. Peselev, “Theoretical and applied issues of configuring high-reliability systems of SM computers,” Upr. Sist. Mashin., No. 6, 32–43 (1988).
K. V. Peselev, “Limiting throughput measures of the SM 1700,” Prib. Sist. Uprav., No. 10, 48–54 (1988).