Low overhead fault-tolerant FPGA systems

carter, 1986, a user programmable reconfigurable logic array, Proc IEEE Custom Integrated Circuits Conf, 233

10.1109/PROC.1986.13531

10.1109/MC.1984.1659217

10.1109/4.98971

10.1109/4.165332

10.1145/1634.2377

koren, 1985, introducting redundancy into vlsi designs for yield and performance enhancement, Proc Int Conf Fault-Tolerant Computing, 330

10.1109/JSSC.1987.1052682

10.1109/FTCS.1990.89352

10.1145/1468075.1468151

michinishi, 1996, a test methodology for configurable lgoic blocks of a look-up table based fpga, Trans Inst Electron Inform Commun Eng, j79d i, 1141

abramovici, 1990, Digital Systems Testing and Testable Designs

10.1109/VTEST.1996.510892

stroud, 1996, built-in self-test of logic blocks in fpga's (finally, a free lunch: bist without overhead!), Proc IEEE VLSI Test Symp, 10.1109/VTEST.1996.510883

10.1109/ARVLSI.1997.634857

chen, 1995, a row-based fpga for signle and multiple stuck-at fault detection, Proc IEEE Int Workshop on Defect and Fault Tolerance in VLSI Systems, 10.1109/DFTVS.1995.476956

xilinx, 1996, The Programmable Logic Data Block

10.1109/4.62145

siewiorek, 1992, Reliable Computer Systems Design and Evaluation

10.1109/92.273147

10.1109/EDTC.1996.494143

10.1109/ICVD.1996.489489

10.1147/rd.401.0051

10.1147/rd.401.0003

10.1109/FTCS.1992.243565