Embedded Deterministic Test

Janusz Rajski1, Jerzy Tyszer2, Mark Kassab1, Nilanjan Mukherjee1
1Mentor Graphics Corp. Wilsonville, OR, USA
2Institute of Electronics and Telecommunications, Poznan University of Technology, Poznan, Poland#TAB#

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Tài liệu tham khảo

10.1109/VTEST.2003.1197656

10.1109/MDT.2003.1188267

10.1109/TEST.2002.1041773

rajski, 2002, Method for Synthesizing Linear Finite State Machines

rajski, 2001, Test Pattern Compression for an Integrated Circuit Test Environment

10.1109/TEST.2003.1270904

10.1109/VTS.2002.1011103

10.1109/VTS.2002.1011119

10.1109/12.736428

rajski, 2003, Method and Apparatus for Selectively Compacting Test Responses

10.1109/12.364534

10.1109/TEST.2000.894274

10.1109/TEST.1999.805650

10.1109/TEST.2001.966672

10.1109/ATS.2001.990273

10.1109/ICVD.2000.812624

10.1109/VTEST.1999.766654

10.1109/TEST.1998.743186

keller, 2001, opmisr: the foundation for compressed atpg vectors, Proc ITC, 748

koenemann, 1991, lfsr-coded test patterns for scan designs, Proc European Test Conf, 237

10.1109/VTEST.2000.843834

10.1109/VTEST.2003.1197640

10.1109/VTS.2001.923416

mrugalski, 2003, high speed ring generators and compactors of test data, Proc IEEE VLSI Test Symp, 57

10.1109/TEST.2001.966671

10.1109/43.875312

10.1109/TEST.2000.894198

10.1109/VTEST.2000.843867

10.1109/TCAD.2003.811451

10.1145/378239.378388

10.1109/FTCS.1999.781060

10.1109/MDT.2002.1033794

10.1109/ATS.2001.990304

10.1109/TEST.2002.1041775

10.1109/TEST.2001.966711

10.1109/TEST.2001.966712

10.1145/288548.288563

10.1109/VTEST.2000.843868

10.1109/TEST.2002.1041774