Dual gate lateral inversion layer emitter transistor

This paper describes the concept, fabrication and characterisation of a dual gate lateral inversion layer emitter transistor (DGLILET). Although the use of an inversion layer as an emitter was proposed by Udrea and Amaratunga (Proc. ISPSD'97, p. 305-308, 1997), this is the first report of a DGLILET using a p-type inversion layer. Compared with other work previously published on vertical (Huang, Solid-State Electron., vol. 38, no. 4, p. 829-838) and lateral devices (Hardikar et al, Proc. ISPSD'99, p 261-264, 1999; Chun, Proc. ISPSD'2000, p. 149-152, 2000), this device achieves a smooth I-V characteristic without trading off on-state against switching performance by minority carrier injection using a dynamic inversion layer. The device is particularly attractive for emerging high voltage integrated circuits where achieving a high current density with minimum losses is particularly important.