Dead-Time Compensation of Inverters Considering Snubber and Parasitic Capacitance

IEEE Transactions on Power Electronics - Tập 29 Số 6 - Trang 3179-3187 - 2014
Zhendong Zhang1, Longya Xu1
1Dept. of Electr. & Comput. Eng., Ohio state Univ., Columbus, OH, USA

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Tài liệu tham khảo

10.1109/TPEL.2005.854046

10.1109/LPEL.2005.851310

10.1109/TIA.2005.857472

zhang, 2005, A novel IGBT gate driver to eliminate the dead-time effect, Proc IEEE IAS Annu Meeting, 2, 913

10.1109/TPEL.2007.915766

choi, 1999, A novel dead time minimization algorithm of the PWM inverter, Proc IEEE 34th IAS Annu Meeting Ind Appl Conf Record, 4, 2188, 10.1109/IAS.1999.798757

10.1109/28.273622

10.1109/63.486169

10.1109/TIA.2005.844411

10.1049/ip-epa:20045123

10.1109/TEC.2009.2031811

10.1109/28.464512

10.1109/41.564157

10.1109/TIE.2004.834940

10.1109/63.774205

10.1109/TIE.2007.894770

10.1109/TIA.1987.4504998

10.1109/41.88903

10.1109/TPEL.2003.818833

10.1109/TPEL.2002.807190