Configurable multi-layer CNN-UM emulator on FPGA
Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications - Trang 164-171
Tóm tắt
A new emulated digital multi-layer CNN-UM chip architecture called Falcon has been developed. In this paper the main steps of the FPGA implementation are introduced. Main results are as follows: CNN-UM architecture emulated on Xilinx Virtex series FPGA, 3D non-linear spatio-temporal dynamics can be implemented on this architecture. The critical parameters of the implementation in single layer configuration are 55 million cell update/second/processor core or equivalently 1 GOPS computing performance. In face of the high performance the power requirements of the architecture are relatively low only /spl sim/3 W per processor core. Using re-configurable devices to implement emulated digital architectures provides more flexibility compared to the custom VLSI designs because different Falcon architectures can be used on the same FPGA device.
Từ khóa
#Field programmable gate arrays #Cellular neural networks #Equations #Computer architecture #Very large scale integration #Signal processing #Analog computers #State feedback #Laboratories #Turing machinesTài liệu tham khảo
balya, 2002, A CNN Framework for Modelling Parallel Processing in a Mammalian Retina, Int J on Circuit Theory and Applications, 29
szolgay, 1998, Analogic algorithms for optical detection of breaks and short circuits on the layouts of printed circuit boards using CNN, Int J of Circuit Theory and Applications, 26
keresztes, 1999, An emulated digital CNN implementation, International Journal of VLSI Signal Processing, 10.1023/A:1008141017714
10.1002/(SICI)1097-007X(199605/06)24:3<341::AID-CTA920>3.0.CO;2-L
0, Xilinx Products Homepage
0, Intel Performance Libraries Homepage
liñán, 2001, ACE16k: A Programmable Focal Plane Vision Processor with $128 \times 128$ Resolution, Proceedings European Conference on Circuit Theory and Design, 1, 345
10.1109/82.222815