Compiler-directed cache management in multiprocessors

Computer - Tập 23 Số 6 - Trang 39-47 - 1990
Hoichi Cheong1, Alexander V. Veidenbaum1
1Illinois Univ., Urbana, IL, , USA

Tóm tắt

Từ khóa


Tài liệu tham khảo

dubois, 1986, Buffering in Multiprocessors, Proc Int l Symp Computer Architecture, 14, 434, 10.1145/17356.17406

darema-rogers, 1986, Memory Access Patterns of Parallel Scientific Programs

cytron, 1988, Automatic Management of Programmable Caches, Proc 1988 Int'l Conf Parallel Processing, ii, 229

veidenbaum, 1986, A Compiler-Assisted Cache Coherence Solution for Multiprocessors, Proc 1986 Int'l Conf Parallel Processing, 1,029

10.1145/318789.318824

kuck, 1980, The Structure of an Advanced Vectorizer for Pipelined Processors, Computer Software and Applications Conf (CompSAC 80), 709

10.1109/71.113080

cheong, 1988, Stale Data Detection and Coherence Enforcement Using Flow Analysis, Proc 1988 Int'l Conf on Parallel Processing, i, 138

10.1109/ISCA.1988.5240

10.1145/800015.808205

smith, 1985, CPU Cache Consistency with Software Support and Using One-Time Identifiers, Proc Pacific Computer Communications Symp, 153

sweazey, 1986, A Class of Compatible Cache Consistency Protocols and Their Support by the IEEE Futurebus, Proc Int l Symp Computer Architecture, 14, 414, 10.1145/17356.17404