Closed-Form <emphasis>RC</emphasis> and <emphasis>RLC</emphasis> Delay Models Considering Input Rise Time

kay, 1998, PRIMO: probability interpretation of moments for delay calculation, Proceedings 1998 Design and Automation Conference 35th DAC (Cat No 98CH36175) DAC, 463

10.1145/640000.640009

10.1109/ICCAD.1996.568907

10.1109/43.559334

10.1109/43.920682

10.1109/ICCAD.2000.896479

anderson, 1991, Fundamentals of Aerodynamics

liboff, 1992, Introductory Quantum Mechanics

cheng, 2000, Interconnect Analysis and Synthesis

ismail, 1998, Figures of merit to characterize the importance of on-chip inductance, Proceedings 1998 Design and Automation Conference 35th DAC (Cat No 98CH36175) DAC, 560, 10.1145/277044.277193

10.1109/TCAD.1983.1270037

wyatt, 1987, Circuit Analysis Simulation and Design

10.1109/43.285250

10.1109/43.45867

10.1109/DAC.2003.1219028

10.1109/43.664231

10.1063/1.1697872

10.1109/43.822622

10.1145/274535.274539

kim, 2004, Modeling and screening on-chip interconnect inductance

rabaey, 1996, Digital Integrated Circuits A Design Perspective

10.1109/43.559334

nilson, 1993, Electric Circuits

2001, Star-RC XT Option User Guide

10.1093/comjnl/7.4.308