Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays

IEEE Transactions on Dependable and Secure Computing - Tập 8 Số 2 - Trang 207-217 - 2011
J. Collet1, Piotr Zając2, Mihalis Psarakis3, Dimitris Gizopoulos3
1Laboratoire d Analyse et d Architecture des Systèmes, LAAS CNRS-Centre National de la Recherche Scientifique, Toulouse, France
2Department of Microelectronics and Computer Science, Technical University of Lodz, Lodz, Poland
3Department of Informatics, University of Piraeus, Piraeus, Greece

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