Channel Stress and Ballistic Performance Advantages of Gate-All-Around FETs and Inserted-Oxide FinFETs

IEEE Transactions on Nanotechnology - Tập 16 Số 2 - Trang 209-216 - 2017
Daniel Connelly1, Peng Zheng1, Tsu‐Jae King Liu1
1Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA

Tóm tắt

Từ khóa


Tài liệu tham khảo

0, Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates, Proc 2016 IEEE Int Electron Devices Meet Tech Digest

2015, Sentaurus Process Version K-2015 06 User's Manual

2015, Sentaurus Device Version K-2015 06 User's Manual

10.1109/TED.2015.2487367

2015, Sentaurus Device Monte Carlo/S-Band Version K-2015 06 User's Manual

10.1103/PhysRevB.39.9536

10.1109/LED.2015.2438856

10.1109/IEDM.2006.346877

10.1109/IEDM.2005.1609454