CMOS design of cellular APAPs and FPAPAPs: an overview

A. Rdriguez-Vazquez1
1Instituto de Microelectron. de Sevilla-CNM-CSIC, Sevilla, Spain

Tóm tắt

CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors and hence do not need a frontend sensory plane or analog-to-digital converters. The architecture of these visual microprocessors is illustrated in the paper through two prototype chips, namely: ACE4K and ACE16K. In both cases, as in other related chips the architecture includes a core array of interconnected elementary processing units, surrounded by a global circuitry.

Từ khóa

#Integrated circuit interconnections #Microprocessor chips #CMOS technology #Energy consumption #Data systems #Optical sensors #Analog-digital conversion #Prototypes #Timing #Silicon

Tài liệu tham khảo

10.1109/4.766817 10.1109/DATE.2002.998299 10.1007/978-1-4757-2580-3 liñán, 2001, ACE16K: An advanced focal-plane analog programmable array processor, Proc 2001 Eur Solid-State Circuits Conf, 216 paasio, 1997, Minimum size 0.5¼m CMOS programmable 48 × 48 CNN test chip, Proc of the 1997 European Conference on Circuit Theory and Design, 154 10.1109/4.597292 liñán, 1999, A 0.5¼m CMOS 106 transistor analog programmable array processor for real-time image processing, Proc of the 1999 European Solid-State Circuits Conference, 358 rodríguez-vázquez, 1999, MOST-Based Design and Scaling of Synaptic Interconnections in VLSI Analog Array Processing Chips, The Journal of VLSI Signal Processing-Systems for Signal Image and Video Technology, 23, 239, 10.1023/A:1008184732735 roska, 2000, Toward the Visual Microprocessor